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| 型號(hào)： | GS8644V72C-200 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| 中文描述： | 1M X 72 CACHE SRAM, 6.5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1 MM PITCH, BGA-209 |
| 文件頁數(shù)： | 16/40頁 |
| 文件大?。?/td> | 843K |
| 代理商： | GS8644V72C-200 |
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GS8644V18(B/E)/GS8644V36(B/E)/GS8644V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
16/40
2003, GSI Technology
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
3.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8644V72C-200I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V72C-225 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 72MBIT 1MX72 6.5NS/2.7NS 209BGA - Trays |
| GS8644V72C-225I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 72MBIT 1MX72 6.5NS/2.7NS 209BGA - Trays |
| GS8644V72C-250 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V72C-250I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
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