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參數(shù)資料
| 型號： | GS8644V36E-225 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| 中文描述： | 2M X 36 CACHE SRAM, 6.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FBGA-165 |
| 文件頁數(shù)： | 31/40頁 |
| 文件大?。?/td> | 843K |
| 代理商： | GS8644V36E-225 |
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GS8644V18(B/E)/GS8644V36(B/E)/GS8644V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
31/40
2003, GSI Technology
JTAG Port AC Test Conditions
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
011
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
RFU
110
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1.
2.
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as as shown unless otherwise noted.
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DDQ
/2
V
DDQ
/2
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
DQ
V
DDQ
/2
50
30pF
*
JTAG Port AC Test Load
* Distributed Test Jig Capacitance
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8644V36E-225I | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V36E-250 | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V36E-250I | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V72C-133 | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V72C-133I | 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8644V36E-225I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V36E-250 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V36E-250I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs |
| GS8644V72C-133 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 72MBIT 1MX72 8.5NS/3.5NS 209BGA - Trays |
| GS8644V72C-133I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 72MBIT 1MX72 8.5NS/3.5NS 209BGA - Trays |
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