參數(shù)資料
      型號(hào): GS8322V18B-150
      廠商: GSI TECHNOLOGY
      元件分類: DRAM
      英文描述: 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
      中文描述: 2M X 18 CACHE SRAM, 8.5 ns, PBGA119
      封裝: 14 X 22 MM, 1.27 MM PITCH, FPBGA-119
      文件頁數(shù): 32/42頁
      文件大?。?/td> 1038K
      代理商: GS8322V18B-150
      JTAG Port Recommended Operating Conditions and DC Characteristics
      Parameter
      Symbol
      V
      IHJ
      V
      ILJ
      I
      INHJ
      I
      INLJ
      I
      OLJ
      V
      OHJ
      V
      OLJ
      V
      OHJC
      V
      OLJC
      Min.
      0.6 * V
      DD
      Max.
      V
      DD
      +0.3
      0.3 * V
      DD
      Unit Notes
      1.8 V Test Port Input High Voltage
      V
      1
      1.8 V Test Port Input Low Voltage
      0.3
      V
      1
      TMS, TCK and TDI Input Leakage Current
      300
      1
      uA
      2
      TMS, TCK and TDI Input Leakage Current
      1
      100
      uA
      3
      TDO Output Leakage Current
      1
      1
      uA
      4
      Test Port Output High Voltage
      1.7
      V
      5, 6
      Test Port Output Low Voltage
      0.4
      V
      5, 7
      Test Port Output CMOS High
      V
      DDQ
      – 100 mV
      V
      5, 8
      Test Port Output CMOS Low
      100 mV
      V
      5, 9
      Notes:
      1.
      2.
      3.
      4.
      5.
      6.
      7.
      8.
      9.
      Input Under/overshoot voltage must be
      2 V > Vi < V
      DDn
      +2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tTKC.
      V
      ILJ
      V
      IN
      V
      DDn
      0 V
      V
      IN
      V
      ILJn
      Output Disable, V
      OUT
      = 0 to V
      DDn
      The TDO output driver is served by the V
      DDQ
      supply.
      I
      OHJ
      =
      4 mA
      I
      OLJ
      = + 4 mA
      I
      OHJC
      = –100 uA
      I
      OHJC
      = +100 uA
      Preliminary
      GS8322V18(B/E)/GS8322V36(B/E)/GS8322V72(C)
      Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
      Rev: 1.04 4/2005
      32/42
      2003, GSI Technology
      JTAG Port AC Test Conditions
      Notes:
      1.
      2.
      Include scope and jig capacitance.
      Test conditions as as shown unless otherwise noted.
      Parameter
      Conditions
      V
      DD
      – 0.2 V
      0.2 V
      1 V/ns
      V
      DDQ
      /2
      V
      DDQ
      /2
      Input high level
      Input low level
      Input slew rate
      Input reference level
      Output reference level
      DQ
      V
      DDQ
      /2
      50
      30pF
      *
      JTAG Port AC Test Load
      * Distributed Test Jig Capacitance
      相關(guān)PDF資料
      PDF描述
      GS8322V18B-150I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
      GS8322V18B-166 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
      GS8322V18B-166I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
      GS8322V18B-200 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
      GS8322V18B-200I 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs
      相關(guān)代理商/技術(shù)參數(shù)
      參數(shù)描述
      GS8322V18B-150I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 36MBIT 2MX18 8.5NS/3.8NS 119FBGA - Trays
      GS8322V72C-133 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/4NS 209FBGA - Trays
      GS8322V72C-133I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/4NS 209FBGA - Trays
      GS8322V72C-150 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/3.8NS 209FBGA - Trays
      GS8322V72C-150I 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V 36MBIT 512KX72 8.5NS/3.8NS 209FBGA - Trays