參數(shù)資料
型號(hào)： GS8170LW36AC
廠商： GSI TECHNOLOGY
英文描述： 18Mb ヒ1x1Lp CMOS I/O Late Write SigmaRAM
中文描述： 35.7ヒ1x1Lp的CMOS的I / O后寫(xiě)入SigmaRAM
文件頁(yè)數(shù)： 10/32頁(yè)
文件大?。?/td> 765K
代理商： GS8170LW36AC
GS8170LW36/72AC-350/333/300/250
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 4/2005
10/32
2003, GSI Technology
It should be noted that deselection of the RAM via E2 and E3 also deselects the Echo Clock output drivers. The deselection of
Echo Clock drivers is always pipelined to the same degree as output data.
Deselection of the RAM via E1 does not deactivate the
Echo Clocks.
Programmable Enables
Σ
RAMs feature two user-programmable chip enable inputs, E2 and E3. The sense of the inputs, whether they function as active
low or active high inputs, is determined by the state of the programming inputs, EP2 and EP3. For example, if EP2 is held at V
DD
,
E2 functions as an active high enable. If EP2 is held to V
SS
, E2 functions as an active low chip enable input.
Programmability of E2 and E3 allows four banks of depth expansion to be accomplished with no additional logic. By programming
the enable inputs of four SRAMs in binary sequence (00, 01, 10, 11) and driving the enable inputs with two address inputs, four
SRAMs can be made to look like one larger RAM to the system.
Example Four Bank Depth Expansion Schematic—
Σ
1x1Lp
A
CK
E1
E2
E3
W
DQ
CQ
A
0
–A
n
CK
W
DQ
0
–DQ
n
Bank 0
Bank 1
Bank 2
Bank 3
Bank Enable Truth Table
EP2
V
SS
V
SS
V
DD
V
DD
EP3
V
SS
V
DD
V
SS
V
DD
E2
E3
Bank 0
Bank 1
Bank 2
Bank 3
Active Low
Active Low
Active High
Active High
Active Low
Active High
Active Low
Active High
E1
A
n – 1
A
n
A
0
–A
n – 2
A
n – 1
A
n
A
0
–A
n – 2
A
n – 1
A
n
A
0
–A
n – 2
A
n – 1
A
n
A
0
–A
n – 2
A
CK
E2
E3
W
DQ
CQ
A
CK
E2
E3
W
DQ
CQ
A
CK
E2
E1
E3
W
DQ
CQ
E1
E1
CQ
EP2
EP3
0
0
EP2
EP3
1
0
EP2
EP3
0
1
EP2
EP3
1
1
相關(guān)PDF資料
PDF描述
GS8321Z18E-133IV 36Mb Pipelined and Flow Through Synchronous NBT SRAMs
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GS8321Z18E-150V 36Mb Pipelined and Flow Through Synchronous NBT SRAMs
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8170LW36AC-300I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.8NS 209FBGA - Trays
GS8170LW36AGC-250 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 2.1NS 209FBGA - Trays
GS8170LW36AGC-250I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 2.1NS 209FBGA - Trays
GS8170LW36AGC-350 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.7NS 209FBGA - Trays
GS8170LW36AGC-350I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V 18MBIT 512KX36 1.7NS 209FBGA - Trays
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