- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370311 > GCIXF1002EDT Controller Miscellaneous - Datasheet Reference PDF資料下載
參數(shù)資料
| 型號： | GCIXF1002EDT |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 125/128頁 |
| 文件大?。?/td> | 1262K |
| 代理商： | GCIXF1002EDT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁當(dāng)前第125頁第126頁第127頁第128頁
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
Datasheet
125
Multi-Packet Mode
C
C.1
Overview
This addendum contains the description of a new Multi-Packet Mode of operation introduced for
the IXF1002 Dual Port Gigabit Ethernet Controller (GCIXF1002ED only).
C.2
Introduction - txrdy Assertion/Deassertion Rules
The IXF1002 uses a generic bus interface (IX Bus) for data transfer to and from its FIFOs. The
Transmit FIFO (TFIFO) is accessed according to a port selection signal (fps) as well as a transmit
enabling signal (txsel_l). When a data transfer occurs, it is synchronized to the main clock (clk),
and new data may be sent on each clock cycle. The IXF1002 provides a dedicated signal (txrdy),
which indicates that it is ready for data transfer into the TFIFO. The IXF1002 asserts the txrdy
signal when both of the following criteria are met:
The amount of free space in the TFIFO is greater than the predetermined FIFO transmit
threshold
(FFO_TSHD<TTH>).
The number of full packets stored in the TFIFO is less than two.
When the txrdy signal is asserted, the transfer burst size should be shorter than or equal to the FIFO
transmit threshold to ensure that there is adequate space in the TFIFO to store the data. The
IXF1002 allows transferring of up to one packet in a single data transfer burst.
Packet transmission across the IX Bus should continue until the amount of data sent is equal to the
FIFO transmit threshold or until the entire packet is transmitted into the TFIFO (i.e. EOP is
reached).
The IXF1002 deasserts txrdy to indicate at least one of the following:
The amount of free space in the TFIFO is below the FIFO transmit threshold
(FFO_TSHD<TTH>)
The number of full packets stored in the TFIFO is two
A data burst across the IX Bus is in progress
The FIFO transmit threshold value should be carefully selected based on latency, IX Bus data
transfer bandwidth, and frame sizes in order to avoid transmit underflow scenarios.
When a high serial transmit threshold value is programmed (TX_TSHD<TSD>), there may be
scenarios and systems when the IXF1002 limits the system performance from reaching full wire
speed bandwidth.This scenario mainly occurs when a small packet is transmitted between streams
of large packets. The cause of this performance degradation is related to the two packet maximum
in the TFIFO.
In order to overcome this problem, Multi-Packet Mode is introduced. In Multi-Packet Mode, the
maximum number of complete packets that can be stored in the TFIFO is sixteen instead of two.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GCIXF440AC | Controller Miscellaneous - Datasheet Reference |
| GCIXF440ACT | Controller Miscellaneous - Datasheet Reference |
| GCIXP1250-166 | Microprocessor |
| GCIXP1250-200 | Microprocessor |
| GCIXP1250-232 | Microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GCIXF1012EC.A3-884560 | 功能描述:IC ETHERNET MAC 12PORT 672-BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:2,450 系列:- 控制器類型:SPI 總線至 I²C 總線橋接 接口:I²C，串行，SPI 電源電壓:2.4 V ~ 3.6 V 電流 - 電源:11mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-HVQFN（4x4） 包裝:托盤 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名稱:935286452157SC18IS600IBSSC18IS600IBS-ND |
| GCIXF1012ECA3 | 制造商:Cortina Systems Inc 功能描述: 制造商:Intel 功能描述: |
| GCIXF1024EC.A3-884561 | 功能描述:IC ETHERNET MAC 24PORT 672-BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| GCIXF18104EE-B0 | 制造商:Cortina Systems Inc 功能描述: |
| GCIXF18201ECB1 | 制造商:Intel 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。