
MOTOROLA
Chapter 8. Signal Descriptions
8-23
Signal Descriptions
size signals are used with the address signals for aligned transfers.
Table 9-6 shows how the transfer size signals are used with the
address signals for misaligned transfers.
For external control instructions (
eciwx
and
ecowx
), core_tsiz[0:2]
are used to output bits 29–31 of the external access register (EAR),
which are used to form the resource ID
(core_tbst_out||core_tsiz[0:2]).
Assertion/Negation—The same as core_a_out[0:31].
High Impedance—The same as core_a_out[0:31].
Timing Comments
8.3.4.3
Transfer Burst
There is both a transfer burst input and transfer burst output signal on the G2 core.
8.3.4.3.1
Transfer Burst In (core_tbst_in)
Following are the state meaning and timing comments for core_tbst_in.
State Meaning
Asserted/Negated—Used when snooping single-beat reads (read
with no intent to cache) to indicate that a burst transfer is in progress.
Timing Comments
Assertion/Negation—The same as core_a_in[0:31].
8.3.4.3.2
Transfer Burst Out (core_tbst_out)
Following are the state meaning and timing comments for core_tbst_out.
State Meaning
Asserted—Indicates that a burst transfer is in progress.
Negated—Indicates that a burst transfer is not in progress.
Table 8-8. Data Transfer Size
core_tbst_out
core_tsiz[0:2]
Transfer Size
Asserted
010
Burst (32 bytes)
Negated
000
8 bytes
Negated
001
1 byte
Negated
010
2 bytes
Negated
011
3 bytes
Negated
100
4 bytes
Negated
101
5 bytes
Negated
110
6 bytes
Negated
111
7 bytes
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