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參數(shù)資料
| 型號： | CDB42L51 |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 35/43頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR CS42L51 CODEC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 音頻編解碼器 |
| 嵌入式： | 是，其它 |
| 已用 IC / 零件： | CS42L51，CS8406，CS8415 |
| 主要屬性： | 立體聲數(shù)字音頻發(fā)射器和接收器 |
| 次要屬性： | 圖形用戶界面，S/PDIF 接口 |
| 已供物品： | 板，CD |
| 相關(guān)產(chǎn)品： | CS42L51-DNZR-ND - IC CODEC STEREO W/HDPN AMP 32QFN 598-1627-ND - IC CODEC STEREO W/HDPN AMP 32QFN CS42L51-CNZR-ND - IC CODEC LOW-V 24BIT 32-QFP 598-1045-ND - IC CODEC STEREO W/HDPN AMP 32QFN |
| 其它名稱： | 598-1005 |
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DS679F1
CS42L51
4.5.3
High-Impedance Digital Output
The serial port may be placed on a clock/data bus that allows multiple masters for the serial port I/O with-
out the need for external buffers. The 3ST_SP bit places the internal buffers for these I/O in a high-imped-
ance state, allowing another device to transmit serial port data without bus contention.
4.5.4
Quarter- and Half-Speed Mode
Quarter-Speed Mode (QSM) and Half-Speed Mode (HSM) allow lower sample rates while maintaining a
relatively flat noise floor in the typical audio band of 20 Hz - 20 kHz. Single-Speed Mode (SSM) will allow
lower frequency sample rates; however, the DAC's noise floor, that normally rises out-of-band, will scale
with the lower sample rate and begin to rise within the audio band. QSM and HSM corrects for most of
this scaling, effectively increasing the dynamic range of the CODEC at lower sample rates, relative to
SSM.
4.6
Digital Interface Formats
The serial port operates in standard IS, Left-Justified or Right-Justified (DAC only) digital interface formats
with varying bit depths from 16 to 24. Data is clocked out of the ADC or into the DAC on the rising edge of
SCLK. Figures 19-21 illustrate the general structure of each format. Refer to “Switching Specifications - Se-
rial Port” on page 20 for exact timing relationship between clocks and data.
Software
Control:
Hardware
Control:
Pin
Setting
Selection
“IS/LJ” pin 3
LO
Left-Justified Interface
HI
IS Interface
CS42L51
Transmitting Device #1
Transmitting Device #2
Receiving Device
3ST_SP
SDOUT
SCLK/LRCK
Figure 18. Tri-State Serial Port
LRCK
SCLK
MS B
LS B
MS B
LS B
AOUTA / AINxA
L e ft C h an ne l
R ig h t C han ne l
SDIN
AOUTB / AINxB
MSB
Figure 19. IS Format
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB42L51/FAE | 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk |
| CDB42L52 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L52/FAE | 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk |
| CDB42L55 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L56 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 24Bit Ultra LP Ster CD w/clH HP RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
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