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參數(shù)資料
| 型號(hào)： | FTRX-3812S361 |
| 元件分類： | 光收發(fā) |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 10700Mbps(Tx), 10700Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR |
| 文件頁(yè)數(shù)： | 11/12頁(yè) |
| 文件大?。?/td> | 291K |
| 代理商： | FTRX-3812S361 |
FTRX-3812S3xx Amplified DWDM XFP Product Specification – September 2007
F i n i s a r
Finisar Corporation 28-September-2007
Rev C1
Page 8
VIII. Digital Diagnostics Functions
As defined by the XFP MSA
1, Finisar XFP transceivers provide digital diagnostic
functions via a 2-wire serial interface, which allows real-time access to the following
operating parameters:
Transceiver temperature
Laser bias current
Transmitted optical power
Received optical power
Transceiver supply voltage
TEC Temperature
It also provides a sophisticated system of alarm and warning flags, which may be used to
alert end-users when particular operating parameters are outside of a factory-set normal
range.
The operating and diagnostics information is monitored and reported by a Digital
Diagnostics Transceiver Controller (DDTC) inside the transceiver, which is accessed
through the 2-wire serial interface. When the serial protocol is activated, the serial clock
signal (SCL pin) is generated by the host. The positive edge clocks data into the XFP
transceiver into those segments of its memory map that are not write-protected. The
negative edge clocks data from the XFP transceiver. The serial data signal (SDA pin) is
bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to
mark the start and end of serial protocol activation. The memories are organized as a
series of 8-bit data words that can be addressed individually or sequentially. The 2-wire
serial interface provides sequential or random access to the 8 bit parameters, addressed
from 000h to the maximum address of the memory.
For more detailed information, including memory map definitions, please see the XFP
MSA documentation
1.
Receiver Threshold Adjustment
The FTRX-3812S3xx provides access to receiver decision threshold adjustment via the
2-wire serial interface, in order to improve receiver OSNR performance based on specific
link conditions. It is implemented as follows:
Rx Threshold of XFP transceivers will be factory-set for optimized performance
in non-FEC applications. This will be the default value during both cold start
(power-up) and warm start (module reset).
The transceiver supports adjustment of Rx Threshold value by the host through
register 76d, table 01h. This is intended to be used in FEC applications.
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