參數(shù)資料
型號: FTLX1412M3BCL
元件分類: 光收發(fā)
英文描述: FIBER OPTIC TRANSCEIVER, 1290-1330nm, 10000Mbps(Tx), 10000Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR
封裝: ROHS COMPLIANT PACKAGE-30
文件頁數(shù): 4/11頁
文件大小: 255K
代理商: FTLX1412M3BCL
FTLX1412M3BCL Multirate XFP Product Specification – September 2007
F i n i s a r
Finisar Corporation 13-September-07
Rev B
Page 2
I.
Pin Descriptions
Pin
Logic
Symbol
Name/Description
Ref.
1
GND
Module Ground
1
2
VEE5
Optional –5.2 Power Supply – Not required
3
LVTTL-I
Mod-Desel
Module De-select; When held low allows the module to
respond to 2-wire serial interface commands
4
LVTTL-O
Interrupt
Interrupt (bar); Indicates presence of an important condition
which can be read over the serial 2-wire interface
2
5
LVTTL-I
TX_DIS
Transmitter Disable; Transmitter laser source turned off
6
VCC5
+5 Power Supply– Not required
7
GND
Module Ground
1
8
VCC3
+3.3V Power Supply
9
VCC3
+3.3V Power Supply
10
LVTTL-I
SCL
Serial 2-wire interface clock
2
11
LVTTL-
I/O
SDA
Serial 2-wire interface data line
2
12
LVTTL-O
Mod_Abs
Module Absent; Indicates module is not present. Grounded
in the module.
2
13
LVTTL-O
Mod_NR
Module Not Ready; Finisar defines it as a logical OR
between RX_LOS and Loss of Lock in TX/RX.
2
14
LVTTL-O
RX_LOS
Receiver Loss of Signal indicator
2
15
GND
Module Ground
1
16
GND
Module Ground
1
17
CML-O
RD-
Receiver inverted data output
18
CML-O
RD+
Receiver non-inverted data output
19
GND
Module Ground
1
20
VCC2
+1.8V Power Supply – Not required
Power Down; When high, places the module in the low
power stand-by mode and on the falling edge of P_Down
initiates a module reset
21
LVTTL-I
P_Down/RST
Reset; The falling edge initiates a complete reset of the
module including the 2-wire serial interface, equivalent to a
power cycle.
22
VCC2
+1.8V Power Supply – Not required
23
GND
Module Ground
1
24
PECL-I
RefCLK+
Reference Clock non-inverted input, AC coupled on the
host board – Not required
3
25
PECL-I
RefCLK-
Reference Clock inverted input, AC coupled on the host
board – Not required
3
26
GND
Module Ground
1
27
GND
Module Ground
1
28
CML-I
TD-
Transmitter inverted data input
29
CML-I
TD+
Transmitter non-inverted data input
30
GND
Module Ground
1
Notes:
1.
Module circuit ground is isolated from module chassis ground within the module.
2.
Open collector; should be pulled up with 4.7k – 10kohms on host board to a voltage between 3.15V
and 3.6V.
3.
A Reference Clock input is not required by the FTLX1412M3BCL. If present, it will be ignored.
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