參數(shù)資料
型號： FS7VS-5
廠商： Mitsubishi Electric Corporation
英文描述： HIGH-SPEED SWITCHING USE
中文描述： 高速開關使用
文件頁數(shù)： 84/91頁
文件大?。?/td> 488K
代理商： FS7VS-5
PSD935G2
PSD9XX Family
83
Symbol
Parameter
1
Conditions Typical
2
Max Unit
C
IN
C
OUT
C
VPP
Capacitance (for input pins only)
V
IN
= 0 V
V
OUT
= 0 V
V
PP
= 0 V
4
6
pF
Capacitance (for input/output pins)
8
12
pF
Capacitance (for CNTL2/V
PP
)
18
25
pF
NOTES:
1. These parameters are only sampled and are not 100% tested.
2. Typical values are for T
A
= 25
°
C and nominal supply voltages.
T
A
= 25 °C, f = 1 MHz
14.0
Pin Capacitance
15.0
Figure 34.
AC Testing
Input/Output
Waveform
16.0
Figure 35.
AC Testing
Load Circuit
17.0
Programming
3.0V
0V
TEST POINT
1.5V
DEVICE
UNDER TEST
2.01 V
195
C
L
= 30 pF
(INCLUDING
SCOPE AND JIG
CAPACITANCE)
Upon delivery from ST, the PSD935G2 device has all bits in the PLDs and
memories in the
“
1
”
or high state. The configuration bits are in the
“
0
”
or low state. The
code, configuration, and PLDs logic are loaded through the procedure of programming.
Information for programming the device is available directly from ST. Please
contact your local sales representative. (See the last page.)
相關PDF資料
PDF描述
PSD935F3V-15B81 Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15B81I Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 30000uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-0.1pF; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: Solder Coated (Sn/Pb, 70/30); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate
PSD935F3V-15J Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15M Configurable Memory System on a Chip for 8-Bit Microcontrollers
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