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參數(shù)資料
| 型號(hào)： | FM25L16-G |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | 4Kb FRAM Serial 3V Memory |
| 中文描述： | 4Kb的鐵電串行3V的記憶 |
| 文件頁(yè)數(shù)： | 2/14頁(yè) |
| 文件大?。?/td> | 149K |
| 代理商： | FM25L16-G |
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FM25L16
Rev. 2.0
Mar. 2005
Page 2 of 14
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
Address Register
Counter
512 x 32
FRAM Array
11
Data I/O Register
8
Nonvolatile Status
Register
3
WP
CS
HOLD
SCK
SO
SI
Figure 1. Block Diagram
Pin Descriptions
Pin Name
/CS
I/O
Input
Description
Chip Select: This active low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the SCK signal. A falling edge on /CS must occur
prior to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 20 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on SCK or /CS. All transitions on /HOLD must occur while
SCK is low.
Write Protect: This active low pin prevents write operations to the status register. This
is critical since other write protection features are controlled through the status
register. A complete explanation of write protection is provided on pages 6 and 7.
Serial Input: All data is input to the device on this pin. The pin is sampled on the
rising edge of SCK and is ignored at other times. It should always be driven to a valid
logic level to meet I
DD
specifications.
* SI may be connected to SO for a single pin data interface.
Serial Output: This is the data output pin. It is driven during a read and remains tri-
stated at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* SO may be connected to SI for a single pin data interface.
Power Supply (2.7V to 3.6V)
Ground
SCK
Input
/HOLD
Input
/WP
Input
SI
Input
SO
Output
VDD
VSS
Supply
Supply
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FM25L16-GA | 功能描述:F-RAM 16K (2Kx8) 2.7V Grade 3 AEC-Q100 RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM25L16-GATR | 功能描述:F-RAM 16K (2Kx8) 2.7V Grade 3 AEC-Q100 RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM25L16-GTR | 功能描述:F-RAM 16K (2Kx8) 2.7V RoHS:否 存儲(chǔ)容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM25L256 | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:256Kb FRAM Serial 3V Memory - Extended Temp |
| FM25L256B | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:256Kb FRAM Serial 3V Memory |
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