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    參數(shù)資料
    型號: FIN210ACGFX
    廠商: Fairchild Semiconductor
    文件頁數(shù): 13/17頁
    文件大小: 0K
    描述: IC SER/DES 10BIT 42-USSBGA
    標準包裝: 3,000
    功能: 串行器/解串器
    輸入類型: LVCMOS
    輸出類型: 串行
    輸入數(shù): 10
    輸出數(shù): 1
    電源電壓: 1.65 V ~ 3.6 V
    工作溫度: -30°C ~ 70°C
    安裝類型: 表面貼裝
    封裝/外殼: 42-VFBGA
    供應商設備封裝: 42-BGA
    包裝: 帶卷 (TR)
    SC16IS741_1
    NXP B.V. 2010. All rights reserved.
    Product data sheet
    Rev. 01 — 29 April 2010
    5 of 52
    NXP Semiconductors
    SC16IS741
    Single UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
    [1]
    7.
    Functional description
    The UART will perform serial-to-I2C conversion on data characters received from
    peripheral devices or modems, and I2C-to-serial conversion on data characters
    transmitted by the host. The complete status the SC16IS741 UART can be read at any
    time during functional operation by the host.
    The SC16IS741 can be placed in an alternate mode (FIFO mode) relieving the host of
    excessive software overhead by buffering received/transmitted characters. Both the
    receiver and transmitter FIFOs can store up to 64 characters (including three additional
    bits of error status per character for the receiver FIFO) and have selectable or
    programmable trigger levels.
    The SC16IS741 has selectable hardware flow control and software flow control. Hardware
    flow control significantly reduces software overhead and increases system efficiency by
    automatically controlling serial data flow using the RTS output and CTS input signals.
    Software flow control automatically controls data flow by using programmable Xon/Xoff
    characters.
    The UART includes a programmable baud rate generator that can divide the timing
    reference clock input by a divisor between 1 and (216 –1).
    VSS
    9
    -
    ground
    RTS
    10
    O
    UART request to send (active LOW). A logic 0 on the RTS pin
    indicates the transmitter has data ready and waiting to send. Writing a
    logic 1 in the modem control register MCR[1] will set this pin to a
    logic 0, indicating data is available. After a reset this pin is set to a
    logic 1. This pin only affects the transmit and receive operations when
    auto RTS function is enabled via the Enhanced Feature Register
    (EFR[6]) for hardware flow control operation.
    CTS
    11
    I
    UART clear to send (active LOW). A logic 0 (LOW) on the CTS pin
    indicates the modem or data set is ready to accept transmit data from
    the SC16IS741. Status can be tested by reading MSR[4]. This pin
    only affects the transmit and receive operations when auto CTS
    function is enabled via the Enhanced Feature Register EFR[7] for
    hardware flow control operation.
    TX
    12
    O
    UART transmitter output. During the local Loopback mode, the TX
    output pin is disabled and TX data is internally connected to the
    UART RX input.
    RX
    13
    I
    UART receiver input. During the local Loopback mode, the RX input
    pin is disabled and TX data is connected to the UART RX input
    internally.
    RESET
    14
    I
    device hardware reset (active LOW)[1]
    XTAL1
    15
    I
    Crystal input or external clock input. Functions as a crystal input or as
    an external clock input. A crystal can be connected between XTAL1
    and XTAL2 to form an internal oscillator circuit (see Figure 11).
    Alternatively, an external clock can be connected to this pin.
    XTAL2
    16
    O
    Crystal output or clock output. (See also XTAL1.) XTAL2 is used as a
    crystal oscillator output.
    Table 2.
    Pin description …continued
    Symbol
    Pin
    Type Description
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