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參數(shù)資料
| 型號： | FCPL-70 |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 72 MHz, QCC16 |
| 封裝： | ROHS COMPLIANT, SMT-16 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大小： | 432K |
| 代理商： | FCPL-70 |
SELECTABLE FREQUENCY SYNTHESIZER
OPTIMIZED LOOP PARAMETERS
SURFACE MOUNT MODEL: FCPL-70
65 - 72 MHz
FEATURES:
Exceptionally Low Phase Noise
No Programming Required
Lead Free - RoHS Compliant
Patent Pending REL-PRO Technology
Small Size, Surface Mount
Phase Noise
PN/ 70.0006 MHz / 2.08 dBm
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
100
1000
10000
100000
1000000
10000000
Offset Frequency (Hz)
Phase
Noise
(dBc/Hz)
SPECIFICATIONS (Rev. B 05/30/08)
Frequency
65 - 72 MHz
Package #
273LF
Step Size
1 MHz
Reference Input Frequency
10 MHz
Reference Input Voltage
1 V p-p to 3.5 V p-p
Bias Voltage
Vcc
V (Vdc)
I (mA Max.)
PLL
+5
15
VCO
+5
35
Vtune
+5
35
D0, D1, D2
0 V / +5V
Output Power
+3 dBm ±2dB
Spurious & Ref. Sideband
80 dB (Typ.)
Harmonic Suppression
12 dB (Typ.)
Output Impedance
50 Ohms (Nom.)
Typical Phase Noise
Offset
Phase Noise
@ 1 kHz
-120 dBc/Hz
@ 10 kHz
-112 dBc/Hz
@ 100 kHz
-131 dBc/Hz
Operating Temperature Range -40 to +85 °C
Binary Frequency Selection
D2
D1
D0
Frequency (MHz)
0
65
0
1
66
0
1
0
67
0
1
68
1
0
69
1
70
1
0
1
71
1
0
72
Pin-Out
Pin 2 - D0
Pin 3 - D1
Pin 4 - D2
Pin 6 - Ref. Input
Pin 7 - VCC 1 (PLL)
Pin 8 - VCC 2 (Vtune & VCO)
Pin 13 - RF Out
Pin 14 - Lock Detect
Pin 10 to 12 - Ground
Pin 1,5,9,15,16 - NC
NC - Not Connected
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