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參數(shù)資料
| 型號： | FAN5026 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Dual DDR/Dual-output PWM Controller |
| 中文描述： | 雙通道DDR /雙輸出PWM控制器 |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 192K |
| 代理商： | FAN5026 |
FAN5026
PRODUCT SPECIFICATION
REV. 1.0.2b 9/2/03
15
Most MOSFET vendors specify Q
GD
and Q
GS
. Q
G(SW)
can
be determined as: Q
G(SW)
= Q
GD
+ Q
GS
– Q
TH
where Q
TH
is
the gate charge required to get the MOSFET to it’s threshold
(V
TH
). For the high-side MOSFET, V
DS
= VIN, which can
be as high as 20V in a typical portable application. Care
should also be taken to include the delivery of the MOS-
FET’s gate power (P
GATE
)
in calculating the power dissipa-
tion required for the FAN5026:
P
GATE
= Q
G
×
VCC
×
F
SW
(19)
where Q
G
is the total gate charge to reach VCC.
Low-Side Losses
Q2, however, switches on or off with its parallel shottky
diode conducting, therefore V
DS
≈
0.5V. Since P
SW
is
proportional to V
DS
, Q2’s switching losses are negligible and
we can select Q2 based on R
DS(ON)
only.
Conduction losses for Q2 are given by:
where R
DS(ON)
is the R
DS(ON)
of the MOSFET at the highest
operating junction temperature and
is the minimum duty cycle for the converter.
Since D
MIN
< 20% for portable computers, (1–D)
≈
1
produces a conservative result, further simplifying the
calculation.
The maximum power dissipation (P
D(MAX)
) is a function of
the maximum allowable die temperature of the low-side
MOSFET, the
θ
J-A
, and the maximum allowable ambient
temperature rise:
θ
J-A
, depends primarily on the amount of PCB area that can
be devoted to heat sinking (see FSC app note AN-1029 for
SO-8 MOSFET thermal information).
Layout Considerations
Switching converters, even during normal operation,
produce short pulses of current which could cause substan-
tial ringing and be a source of EMI if layout constrains are
not observed.
There are two sets of critical components in a DC-DC
converter. The switching power components process large
amounts of energy at high rate and are noise generators.
The low power components responsible for bias and feed-
back functions are sensitive to noise.
A multi-layer printed circuit board is recommended.
Dedicate one solid layer for a ground plane. Dedicate
another solid layer as a power plane and break this plane
into smaller islands of common voltage levels.
Notice all the nodes that are subjected to high dV/dt voltage
swing such as SW, HDRV and LDRV, for example. All
surrounding circuitry will tend to couple the signals from
these nodes through stray capacitance. Do not oversize
copper traces connected to these nodes. Do not place traces
connected to the feedback components adjacent to these
traces. It is not recommended to use High Density Intercon-
nect Systems, or micro-vias on these signals. The use of
blind or buried vias should be limited to the low current
signals only. The use of normal thermal vias is left to the
discretion of the designer.
Keep the wiring traces from the IC to the MOSFET gate and
source as short as possible and capable of handling peak
currents of 2A. Minimize the area within the gate-source
path to reduce stray inductance and eliminate parasitic
ringing at the gate.
Locate small critical components like the soft-start capacitor
and current sense resistors as close as possible to the respec-
tive pins of the IC.
The FAN5026 utilizes advanced packaging technologies
with lead pitches of 0.6mm. High performance analog
semiconductors utilizing narrow lead spacing may require
special considerations in PWB design and manufacturing.
It is critical to maintain proper cleanliness of the area
surrounding these devices. It is not recommended to use any
type of rosin or acid core solder, or the use of flux in either
the manufacturing or touch up process as these may contrib-
ute to corrosion or enable electromigration and/or eddy
currents near the sensitive low current signals. When
chemicals such as these are used on or near the PWB, it is
suggested that the entire PWB be cleaned and dried
completely before applying power.
P
COND
1
D
–
(
)
I
OUT
2
×
R
DS ON
)
×
=
(20)
D
V
V
IN
--------------
=
P
D MAX
)
T
-------------------------------------------------
T
)
–
J
A
–
=
(21)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FAN5026_11 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Dual DDR / Dual-Output PWM Controller |
| FAN5026MTC | 功能描述:電流型 PWM 控制器 PFC Controller RoHS:否 制造商:Texas Instruments 開關(guān)頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| FAN5026MTC_Q | 功能描述:電流型 PWM 控制器 PFC Controller RoHS:否 制造商:Texas Instruments 開關(guān)頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| FAN5026MTCX | 功能描述:電流型 PWM 控制器 PFC Controller RoHS:否 制造商:Texas Instruments 開關(guān)頻率:27 KHz 上升時間: 下降時間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14 |
| FAN5029 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:8-Bit Programmable 2- to 5-Phase Synchronous Buck Controller |
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