- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375699 > F25L008A-50DG (ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC) 4 Mbit Uniform Sector, Serial Flash Memory PDF資料下載
參數(shù)資料
| 型號： | F25L008A-50DG |
| 廠商： | ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 1M X 8 FLASH 3V PROM, PDIP8 |
| 封裝： | 0.300 INCH, LEAD FREE, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 19/31頁 |
| 文件大?。?/td> | 374K |
| 代理商： | F25L008A-50DG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
ES MT
Enable-Write-Status-Register (EWSR)
The Enable-Write-Status-Register (EWSR) instruction arms the
Write-Status-Register (WRSR) instruction and opens the status
register
for
alteration.
The
instruction does not have any effect and will be wasted, if it is not
followed immediately by the Write-Status-Register (WRSR)
instruction. CE must be driven low before the EWSR instruction
is entered and must be driven high before the EWSR instruction
is executed.
Write-Status-Register (WRSR)
The Write-Status-Register instruction writes new values to the
BP2, BP1, BP0, and BPL bits of the status register. CE must be
driven low before the command sequence of the WRSR
instruction is entered and driven high before the WRSR
instruction is executed. See Figure 11 for EWSR or WREN and
WRSR instruction sequences.
Executing the Write-Status-Register instruction will be ignored
when
WP
is low and BPL bit is set to “1”. When the
WP
is
low, the BPL bit can only be set from “0” to “1” to lockdown the
status register, but cannot be reset from “1” to “0”.
F25L008A
Elite Semiconductor Memory Technology Inc.
Revision
:
1.4
19/31
Publication Date
:
May. 2007
Enable-Write-Status-Register
When
WP
is high, the lock-down function of the BPL bit is
disabled and the BPL, BP0, BP1,and BP2 bits in the status
register can all be changed. As long as BPL bit is set to 0 or
WP
pin is driven high (V
IH
) prior to the low-to-high transition of the
CE pin at the end of the WRSR instruction, the bits in the status
register can all be altered by the WRSR instruction. In this case,
a single WRSR instruction can set the BPL bit to “1” to lock down
the status register as well as altering the BP0 ;BP1 and BP2 bits
at the same time. See Table 3 for a summary description of
WP
and BPL functions.
Figure 11 : ENABLE-WRITE-STATUS-REGISTER (EWSR) or WRITE-ENABLE(WREN) and WRITE-STATUS-REGISTER (WRSR)
CE
SCK
SI
0 1 2 3 4 5 6 7
MSB
MSB
HIGHIMPENANCE
SO
50 or06
MODE3
MODE0
0 1 2 3 4 5 6 7 8 9 101112131415
STATUS
REGISTERIN
7 6 5 4 3 2 1 0
01
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| F25L008A-50PAG | 4 Mbit Uniform Sector, Serial Flash Memory |
| F28F008SA-85 | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| F28F008SA-120 | 8-MBIT (1-MBIT x 8) FlashFileTM MEMORY |
| F28F010-90 | 1024K (128K x 8) CMOS FLASH MEMORY |
| F28F010-120 | 1024K (128K x 8) CMOS FLASH MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| F25L008A-50PAG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:8Mbit (1Mx8) 3V Only Serial Flash Memory |
| F25L008A-50PAIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:8Mbit (1Mx8) 3V Only Serial Flash Memory |
| F25L016A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:16Mbit (2Mx8) 3V Only Serial Flash Memory |
| F25L016A_08 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:16Mbit (2Mx8) 3V Only Serial Flash Memory |
| F25L016A_1 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:16Mbit (2Mx8) 3V Only Serial Flash Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。