I2C COMPATIBLE INTERFACE The ADuC" />
參數(shù)資料
型號： EVAL-ADUC842QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 43/88頁
文件大?。?/td> 0K
描述： KIT DEV QUICK START ADUC842
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC842
所含物品： 評估板、電源、纜線、軟件、仿真器和說明文檔
ADuC841/ADuC842/ADuC843
Rev. 0 | Page 48 of 88
I2C COMPATIBLE INTERFACE
The ADuC841/ADuC842/ADuC843 support a fully licensed
I2C serial interface. The I2C interface is implemented as a full
hardware slave and software master. SDATA is the data I/O pin,
and SCLOCK is the serial clock. These two pins are shared with
the MOSI and SCLOCK pins of the on-chip SPI interface. To
enable the I2C interface, the SPI interface must be turned off
(see SPE in Table 18) or the SPI interface must be moved to
P3.3, P3.4, and P3.5 via the CFG841.1/CFG842.1 bit. Application
Note uC001 describes the operation of this interface as imple-
mented and is available from the MicroConverter website at
Three SFRs are used to control the I2C interface and are
described in the following tables.
I2CCON
I2C Control Register
SFR Address
E8H
Power-On Default
00H
Bit Addressable
Yes
Table 19. I2CCON SFR Bit Designations, Master Mode
Bit No.
Name
Description
7
MDO
I2C Software Master Data Output Bit (Master Mode Only).
This data bit is used to implement a master I2C transmitter interface in software. Data written to this bit is output on
the SDATA pin if the data output enable (MDE) bit is set.
6
MDE
I2C Software Master Data Output Enable Bit (Master Mode Only).
Set by the user to enable the SDATA pin as an output (Tx).
Cleared by the user to enable the SDATA pin as an input (Rx).
5
MCO
I2C Software Master Clock Output Bit (Master Mode Only).
This data bit is used to implement a master I2C transmitter interface in software. Data written to this bit is output on
the SCLOCK pin.
4
MDI
I2C Software Master Data Input Bit (Master Mode Only).
This data bit is used to implement a master I2C receiver interface in software. Data on the SDATA pin is latched into
this bit on SCLOCK if the data output enable (MDE) bit is 0.
3
I2CM
I2C Master/Slave Mode Bit.
Set by the user to enable I2C software master mode.
Cleared by the user to enable I2C hardware slave mode.
2
----
Reserved.
1
----
Reserved.
0
----
Reserved.
Table 20. I2CCON SFR Bit Designations, Slave Mode
Bit No.
Name
Description
7
I2CSI
I2C Stop Interrupt Enable Bit.
Set by the user to enable I2C stop interrupts. If set, a stop bit that follows a valid start condition generates an
interrupt.
Cleared by the user to disable I2C stop interrupts.
6
I2CGC
I2C General Call Status Bit.
Set by hardware after receiving a general call address.
Cleared by the user.
5
I2CID1
I2C Interrupt Decode Bits.
4
I2CID0
Set by hardware to indicate the source of an I2C interrupt.
00
Start and Matching Address.
01
Repeated Start and Matching Address.
10
User Data.
11
Stop after a Start and Matching Address.
3
I2CM
I2C Master/Slave Mode Bit.
Set by the user to enable I2C software master mode.
Cleared by the user to enable I2C hardware slave mode.
相關(guān)PDF資料
PDF描述
EVAL-ADUC841QSPZ KIT DEV QUICK START ADUC841
AT97SC3204T-X1K180 KIT DEV EMBEDDED TPM TWI
RPS-1K-16-10/2.0-9 HEAT SHRINK SLEEVE
ATF15XX-DK3 KIT DEV FOR ATF15XX CPLD'S
ADR02WARZ-REEL7 IC VREF SERIES PREC 5V 8-SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADUC842QS-U 制造商:Analog Devices 功能描述:TOOLS:DEVELOPMENT BOARDS H/W 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk
EVAL-ADUC842QSZ 功能描述:KIT DEV QUICK START ADUC842 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
EVAL-ADUC845QS 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Bulk
EVAL-ADUC845QSP 制造商:Analog Devices 功能描述:MICROCONVERTER?, 1-CYCLE 8052 MCU + 10-CHANNEL, DUAL 24-BIT - Bulk
EVAL-ADUC845QSPZ 功能描述:KIT DEV QUICK START ADUC845 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:QuickStart™ PLUS 套件 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*