參數(shù)資料
型號： EVAL-AD7985EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 11/28頁
文件大小： 0K
描述： BOARD EVAL FOR AD7985
標準包裝： 1
系列： PulSAR®
ADC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 2.5M
數(shù)據(jù)接口： SPI?、QSPI?、MICROWIRE? 和 DSP
輸入范圍： 0 ~ 5 V
在以下條件下的電源（標準）： 15.5mW @ 2.5MSPS
工作溫度： -40°C ~ 85°C
已用 IC / 零件： AD7985
已供物品： 板
AD7985
Rev. A | Page 19 of 28
CS MODE, 3-WIRE WITHOUT BUSY INDICATOR
This mode is usually used when a single AD7985 is connected
to an SPI-compatible digital host. The connection diagram is
shown in Figure 26, and the corresponding timing is given in
With SDI tied to VIO, a rising edge on CNV initiates a con-
version, selects CS mode, and forces SDO to high impedance.
When a conversion is initiated, it continues until completion,
irrespective of the state of CNV. This can be useful, for example,
to bring CNV low to select other SPI devices, such as analog
multiplexers; however, CNV must be returned high before the
minimum conversion time elapses and then held high for the
maximum possible conversion time to avoid the generation of
the busy signal indicator.
When the conversion is complete, the AD7985 enters the
acquisition phase and powers down. When CNV goes low, the
MSB is output onto SDO. The remaining data bits are clocked
by subsequent SCK falling edges. The data is valid on both SCK
edges. Although the rising edge can be used to capture the data,
a digital host using the SCK falling edge allows a faster reading
rate, provided that it has an acceptable hold time. After the 16th
SCK falling edge or when CNV goes high (whichever occurs
first), SDO returns to high impedance.
AD7985
SDI
SDO
CNV
SCK
CONVERT
DATA IN
CLK
DIGITAL HOST
VIO
07947-
009
Figure 26. CS Mode, 3-Wire Without Busy Indicator Connection Diagram (SDI High)
07947-
010
ACQUISITION (n)
ACQUISITION
(n + 1)
ACQUISITION
(n – 1)
1
2
BEGIN DATA (n – 1)
CONVERSION (n)
END DATA (n – 1)
SCK
CNV
SDO
14
15
CONVERSION (n – 1)
END DATA (n – 2)
tCONV
tDATA
0
(I/O QUIET
TIME)
(I/O QUIET
TIME)
16
14
15
16
1
15
14
13
2
0
1
2
SDI = 1
>
tCONV
(I/O QUIET
TIME)
tCYC
tACQ
tCNVH
tQUIET
tSCK
tDIS
tEN
tDSDO
tHSDO
tDATA
tCONV
Figure 27. CS Mode, 3-Wire Without Busy Indicator Serial Interface Timing (SDI High)
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