VINA TRACK/HOLD TO ADC REFERENCE CIRCUITRY TO INTERNAL COMPARATOR R4 R1 R2 6" />
參數(shù)資料
型號: EVAL-AD7899CBZ
廠商: Analog Devices Inc
文件頁數(shù): 16/16頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD7899
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 14
采樣率(每秒): 400k
數(shù)據(jù)接口: 并聯(lián)
輸入范圍: ±10 V
在以下條件下的電源(標(biāo)準(zhǔn)): 80mW @ 400kSPS
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD7899
已供物品:
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REV. A
AD7899
–9–
AD7899-1
VINA
TRACK/HOLD
TO ADC
REFERENCE
CIRCUITRY
TO INTERNAL
COMPARATOR
R4
R1
R2
6k
2.5V
REFERENCE
R3
GND
VINB
VREF
Figure 2. AD7899-1 Analog Input Structure
For the AD7899-1, R1 = 4 k
, R2 = 16 k, R3 = 16 k and
R4 = 8 k
. The resistor input stage is followed by the high
input impedance stage of the track/hold amplifier.
The designed code transitions take place midway between suc-
cessive integer LSB values (i.e., 1/2 LSB, 3/2 LSBs, 5/2 LSBs
etc.) LSB size is given by the formula, 1 LSB = FSR/16384. For
the
±5 V range, 1 LSB = 10 V/16384 = 610.4 V. For the ±10 V
range, 1 LSB = 20 V/16384 = 1.22 mV. Output coding is
two’s complement binary with 1 LSB = FSR/16384. The ideal
input/output transfer function for the AD7899-1 is shown in
Table I.
Table I. Ideal Input/Output Code Table for the AD7899-1
Digital Output
Analog Input
1
Code Transition
+FSR/2 – 3/2 LSB
2
011 . . . 110 to 011 . . . 111
+FSR/2 – 5/2 LSB
011 . . . 101 to 011 . . . 110
+FSR/2 – 7/2 LSB
011 . . . 100 to 011 . . . 101
GND + 3/2 LSB
000 . . . 001 to 000 . . . 010
GND + 1/2 LSB
000 . . . 000 to 000 . . . 001
GND – 1/2 LSB
111 . . . 111 to 000 . . . 000
GND – 3/2 LSB
111 . . . 110 to 111 . . . 111
–FSR/2 + 5/2 LSB
100 . . . 010 to 100 . . . 011
–FSR/2 + 3/2 LSB
100 . . . 001 to 100 . . . 010
–FSR/2 + 1/2 LSB
100 . . . 000 to 100 . . . 001
NOTES
1FSR is full-scale range and is 20 V for the
±10 V range and 10 V for the ±5 V
range, with VREF = 2.5 V.
21 LSB = FSR/16384 = 1.22 mV (
±10 V – AD7899-1) and 610.4 V (±5 V –
AD7899-1) with VREF = 2.5 V.
AD7899-2
Figure 3 shows the analog input section of the AD7899-2. Each
input can be configured for 0 V to 5 V operation or 0 V to 2.5 V
operation. For 0 V to 5 V operation, the VINB input is tied to
GND and the input voltage is applied to the VINA input. For
0 V to 2.5 V operation, the VINA and VINB inputs are tied together
and the input voltage is applied to both. The VINA and VINB
inputs are symmetrical and fully interchangeable.
For the AD7899-2, R1 = 4 k
and R2 = 4 k. Once again, the
designed code transitions occur on successive integer LSB values.
Output coding is straight (natural) binary with 1 LSB = FSR/
16384 = 2.5 V/16384 = 0.153 mV, and 5 V/16384 = 0.305 mV,
for the 0 to 2.5 V and the 0 to 5 V options respectively. Table
II shows the ideal input and output transfer function for the
AD7899-2.
AD7899-2
VINA
TRACK/HOLD
TO ADC
REFERENCE
CIRCUITRY
TO INTERNAL
COMPARATOR
R1
6k
2.5V
REFERENCE
R2
VINB
VREF
Figure 3. AD7899-2 Analog Input Structure
Table II. Ideal Input/Output Code Table for the AD7899-2
Digital Output
Analog Input
1
Code Transition
+FSR – 3/2 LSB
2
111 . . . 110 to 111 . . . 111
+FSR – 5/2 LSB
111 . . . 101 to 111 . . . 110
+FSR – 7/2 LSB
111 . . . 100 to 111 . . . 101
GND + 5/2 LSB
000 . . . 010 to 000 . . . 011
GND + 3/2 LSB
000 . . . 001 to 000 . . . 010
GND + 1/2 LSB
000 . . . 000 to 000 . . . 001
NOTES
1FSR is Full-Scale Range and is 0 to 2.5 V and 0 to 5 V for AD7899-2 with V
REF
= 2.5 V.
21 LSB = FSR/16384 and is 0.153 mV (0 to 2.5 V) and 0.305 mV (0 to 5 V) for
AD7899-2 with VREF = 2.5 V.
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