參數(shù)資料
型號: EVAL-AD7747EBZ
廠商: Analog Devices Inc
文件頁數(shù): 5/28頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD7747
標準包裝: 1
傳感器類型: 觸摸,電容式
接口: I²C
電源電壓: 2.7 V ~ 5.25 V
嵌入式:
已供物品: 板,纜線,CD
已用 IC / 零件: AD7747
產(chǎn)品目錄頁面: 781 (CN2011-ZH PDF)
相關產(chǎn)品: AD7747ARUZ-REEL7-ND - IC CONV CAP TO DIG 24BIT 16TSSOP
AD7747ARUZ-REEL-ND - IC CONV CAP TO DIG 24BIT 16TSSOP
AD7747ARUZ-ND - IC CONV 24BIT CAP-DGTL 16-TSSOP
AD7747
Rev. 0 | Page 13 of 28
the bus, allowing another master device to take control of the
bus. Therefore, a master wanting to retain control of the bus
issues successive start conditions known as repeated start
conditions.
AD7747 RESET
To reset the AD7747 without having to reset the entire I2C bus,
an explicit reset command is provided. This uses a particular
address pointer word as a command word to reset the part and
upload all default settings. The AD7747 does not respond to the
I2C bus commands (do not acknowledge) during the default
values upload for approximately 150 μs (max 200 μs).
The reset command address word is 0xBF.
GENERAL CALL
When a master issues a slave address consisting of seven 0s with
the eighth bit (R/W bit) set to 0, this is known as the general call
address. The general call address is for addressing every device
connected to the I2C bus. The AD7747 acknowledges this
address and read in the following data byte.
If the second byte is 0x06, the AD7747 is reset, completely
uploading all default values. The AD7747 does not respond to
the I2C bus commands (do not acknowledge) during the default
values upload for approximately 150 μs (200 μs maximum).
The AD7747 does not acknowledge any other general call
commands.
P
9
8
1–7
9
8
1–7
9
8
S
SDATA
SCLOCK
START ADDR
ACK
DATA
ACK
STOP
SUBADDRESS
1–7
R/W
05
469
-01
1
Figure 22. Bus Data Transfer
DATA
A(S)
S SLAVE ADDR A(S)
SUB ADDR
A(S)
LSB = 0
LSB = 1
DATA
P
S SLAVE ADDR A(S)
SUB ADDR A(S) S SLAVE ADDR
A(S)
DATA
A(M)
DATA
P
WRITE
SEQUENCE
READ
SEQUENCE
A(S) = NO ACKNOWLEDGE BY SLAVE
A(M) = NO ACKNOWLEDGE BY MASTER
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
S = START BIT
P = STOP BIT
A(S)
A(M)
05
46
9-
0
12
Figure 23. Write and Read Sequences
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