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參數(shù)資料
| 型號： | EVAL-AD7663CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7663 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 輸入范圍： | ±4 REF |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 35mW @ 250kSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7663 |
| 已供物品： | 板，CD |
| 相關(guān)產(chǎn)品： | AD7663ACPZ-ND - IC ADC 16BIT CMOS 5V 48LFCSP AD7663ACPZRL-ND - IC ADC 16BIT CMOS 5V 48LFCSP AD7663ASTZRL-ND - IC ADC 16BIT CMOS 48-LQFP T/R AD7663ASTZ-ND - IC ADC 16BIT CMOS 48-LQFP |
REV. B
AD7663
–11–
100000
10000
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10
1
0.1
0.01
0.001
1
10
100
1000
10000
100000
1000000
AVDD
DVDD
OVDD
OPERA
TING
CURRENTS
–
A
SAMPLING RATE – SPS
TPC 13. Operating Currents vs. Sample Rate
500
450
400
350
300
250
200
150
100
50
0
–55
–35
–15
5
25
45
65
85
105
PO
WER-DO
WN
OPERA
TING
CURRENTS
–
nA
TEMPERATURE – C
DVDD
AVDD
OVDD
TPC 14. Power-Down Operating Currents vs. Temperature
TEMPERATURE – C
10
–10
–55
125
–35
LSB
–15
5
25
456585105
8
0
–4
–6
–8
6
4
–2
2
OFFSET
–FS
+FS
TPC 15. +FS, Offset, and –FS vs. Temperature
CIRCUIT INFORMATION
The AD7663 is a fast, low power, single-supply, precise 16-bit
analog-to-digital converter (ADC). The AD7663 is capable of
converting 250,000 samples per second (250 kSPS) and allows
power saving between conversions. When operating at 100 SPS,
for example, it consumes typically only 15 W. This feature
makes the AD7663 ideal for battery-powered applications.
The AD7663 provides the user with an on-chip track-and-hold,
successive approximation ADC that does not exhibit any pipeline
or latency, making it ideal for multiple multiplexed channel
applications.
It is specified to operate with both bipolar and unipolar input
ranges by changing the connection of its input resistive scaler.
The AD7663 can be operated from a single 5 V supply and can be
interfaced to either 5 V or 3 V digital logic. It is housed in a 48-lead
LQFP package or a 48-lead LFCSP package that combines space
savings and flexible configurations as either serial or parallel inter-
face. The AD7663 is pin-to-pin compatible with the AD7660.
CONVERTER OPERATION
The AD7663 is a successive approximation analog-to-digital
converter based on a charge redistribution DAC. Figure 3 shows
the simplified schematic of the ADC. The input analog signal is
first scaled down and level shifted by the internal input resistive
scaler, which allows both unipolar ranges (0 V to 2.5 V, 0 V to 5 V,
and 0 V to 10 V) and bipolar ranges (±2.5 V, ±5 V, and ±10 V).
The output voltage range of the resistive scaler is always 0 V to
2.5 V. The capacitive DAC consists of an array of 16 binary
weighted capacitors and an additional “LSB” capacitor. The
comparator’s negative input is connected to a “dummy” capacitor
of the same value as the capacitive DAC array.
During the acquisition phase, the common terminal of the array
tied to the comparator’s positive input is connected to AGND
via SWA. All independent switches are connected to the output
of the resistive scaler. Thus, the capacitor array is used as a
sampling capacitor and acquires the analog signal. Similarly, the
dummy capacitor acquires the analog signal on INGND input.
When the acquisition phase is complete and the
CNVST input
goes or is LOW, a conversion phase is initiated. When the conver-
sion phase begins, SWA and SWB are opened first. The capacitor
array and the dummy capacitor are then disconnected from the
inputs and connected to the REFGND input. Therefore, the differ-
ential voltage between the output of the resistive scaler and INGND
captured at the end of the acquisition phase is applied to the
comparator inputs, causing the comparator to become unbalanced.
By switching each element of the capacitor array between
REFGND or REF, the comparator input varies by binary
weighted voltage steps (VREF /2, VREF /4 . . .VREF /65,536). The
control logic toggles these switches, starting with the MSB first,
in order to bring the comparator back into a balanced condition.
After the completion of this process, the control logic generates
the ADC output code and brings the BUSY output LOW.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7663EDZ | 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| EVAL-AD7664CB | 制造商:Analog Devices 功能描述:Evaluation Kit For 16-Bit, 570 KSP Pulsar Unipolar CMOS ADC |
| EVAL-AD7664CBZ | 功能描述:BOARD EVALUATION FOR AD7664 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7665CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Evaluation Board AD766X/AD767X |
| EVAL-AD7665CBZ | 功能描述:BOARD EVALUATION FOR AD7665 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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