VDD
參數(shù)資料
型號(hào)： EVAL-AD7156EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 23/28頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR AD7156
標(biāo)準(zhǔn)包裝： 1
傳感器類型： 觸摸，電容式
接口： I²C
電源電壓： 1.8 V ~ 3.6 V
嵌入式： 否
已供物品： 板，CD
已用 IC / 零件： AD7156
AD7156
Rev. 0 | Page 4 of 28
Parameter
Min
Typ
Max
Test Conditions/Comments
POWER REQUIREMENTS
VDD-to-GND Voltage
1.8
3.6
V
IDD Current4, 8
65
75
μA
VDD ≤ 2.7 V, see Figure 20
70
85
μA
VDD = 3.6 V, see Figure 20
IDD Current Power-Down Mode4, 8
2
10
μA
VDD ≤ 2.7 V, see Figure 21
2
17
μA
VDD = 3.6 V, see Figure 21
1 Capacitance units: 1 pF = 1 × 1012 F; 1 fF = 1015 F.
2 The CAPDAC can be used to shift (offset) the input range. The total capacitance of the sensor can therefore be up to the sum of the CAPDAC value and the conversion
input range. With the auto-DAC feature, the CAPDAC is adjusted automatically when the CDC input value is lower than 25% or higher than 75% of the CDC nominal
input range.
3 The maximum capacitance of the sensor connected between the EXCx and CINx pins is equal to the sum of the minimum guaranteed value of the CAPDAC and the
minimum guaranteed input range.
4 The maximum specification is not production tested but is supported by characterization data at initial product release.
5 The resolution of the converter is not limited by the output data format or output data LSB (least significant bit) size, but by the converter and system noise level. The
noise-free resolution is defined as level of peak-to-peak noise coming from the converter itself, with no connection to the CIN and EXC pins.
6 These specifications are understood separately. Any combination of the capacitance to ground and serial resistance may result in additional errors, for example gain
error, gain drift, offset error, offset drift, and power supply rejection.
7 Specification is not production tested but is guaranteed by design.
8 Digital inputs equal to VDD or GND.
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