參數(shù)資料
型號: EPM3064ATC44-7
英文描述: Electrically-Erasable Complex PLD
中文描述: 電可擦除復雜可編程邏輯器件
文件頁數(shù): 10/53頁
文件大?。?/td> 839K
代理商: EPM3064ATC44-7
18
Altera Corporation
MAX 3000A Programmable Logic Device Family Data Sheet
Design Security
All MAX 3000A devices contain a programmable security bit that controls
access to the data programmed into the device. When this bit is
programmed, a design implemented in the device cannot be copied or
retrieved. This feature provides a high level of design security because
programmed data within EEPROM cells is invisible. The security bit that
controls this function, as well as all other programmed data, is reset only
when the device is reprogrammed.
Generic Testing
MAX 3000A devices are fully functionally tested. Complete testing of
each programmable EEPROM bit and all internal logic elements ensures
100% programming yield. AC test measurements are taken under
conditions equivalent to those shown in Figure 8. Test patterns can be
used and then erased during early stages of the production flow.
Figure 8. MAX 3000A AC Test Conditions
Operating
Conditions
Tables 9 through 12 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for MAX 3000A devices.
VCC
to Test
System
C1 (includes JIG
capacitance)
Device input
rise and fall
times < 2 ns
Device
Output
703
620
[521
]
[481
]
Power supply transients can affect AC
measurements. Simultaneous transitions
of multiple outputs should be avoided for
accurate measurement. Threshold tests
must not be performed under AC
conditions. Large-amplitude, fast-ground-
current transients normally occur as the
device outputs discharge the load
capacitances. When these transients ow
through the parasitic inductance between
the device ground pin and the test system
ground, signicant reductions in
observable noise immunity can result.
Numbers in brackets are for 2.5-V
outputs. Numbers without brackets are for
3.3-V devices or outputs.
Table 9. MAX 3000A Device Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
Supply voltage
With respect to ground (2)
–0.5
4.6
V
VI
DC input voltage
–2.0
5.75
V
IOUT
DC output current, per pin
–25
25
mA
TSTG
Storage temperature
No bias
–65
150
° C
TA
Ambient temperature
Under bias
–65
135
° C
TJ
Junction temperature
PQFP and TQFP packages, under bias
135
° C
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EPM3064ATC44-7N 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 3000A 64 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3064ATI10010 制造商:Altera Corporation 功能描述:
EPM3064ATI100-10 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 3000A 64 Macro 66 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3064ATI100-10N 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX 3000A 64 Macro 66 IOs RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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