參數(shù)資料
型號(hào): EPM3032ALC44-10
英文描述: Electrically-Erasable Complex PLD
中文描述: 電可擦除復(fù)雜可編程邏輯器件
文件頁(yè)數(shù): 50/53頁(yè)
文件大?。?/td> 839K
代理商: EPM3032ALC44-10
6
Altera Corporation
MAX 3000A Programmable Logic Device Family Data Sheet
Figure 2. MAX 3000A Macrocell
Combinatorial logic is implemented in the logic array, which provides
five product terms per macrocell. The product-term select matrix allocates
these product terms for use as either primary logic inputs (to the OR and
XOR
gates) to implement combinatorial functions, or as secondary inputs
to the macrocell’s register preset, clock, and clock enable control
functions.
Two kinds of expander product terms (“expanders”) are available to
supplement macrocell logic resources:
s
Shareable expanders, which are inverted product terms that are fed
back into the logic array
s
Parallel expanders, which are product terms borrowed from adjacent
macrocells
The MAX+PLUS II development system automatically optimizes
product-term allocation according to the logic requirements of the design.
For registered functions, each macrocell flipflop can be individually
programmed to implement D, T, JK, or SR operation with programmable
clock control. The flipflop can be bypassed for combinatorial operation.
During design entry, the designer specifies the desired flipflop type; the
MAX+PLUS II software then selects the most efficient flipflop operation
for each registered function to optimize resource utilization.
Product-
Term
Select
Matrix
36 Signals
from PIA
16 Expander
Product Terms
LAB Local Array
Parallel Logic
Expanders
(from other
macrocells)
Shared Logic
Expanders
Clear
Select
Global
Clear
Global
Clocks
Clock/
Enable
Select
2
PRN
CLRN
Q
ENA
Register
Bypass
to I/O
Control
Block
to PIA
Programmable
Register
VCC
D/T
相關(guān)PDF資料
PDF描述
EPM3032ALC44-4 Eval Board for ISL6118 2.5V to 5V Dual Power Supply Controller with 0.6A Integrated Current Regulation and Timed Delay to Latch-off
EPM3032ALC44-7 Electrically-Erasable Complex PLD
EPM3032ATC44-10
EPM3064ATC44-4
EPM3064ATC44-7 Electrically-Erasable Complex PLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM3032ALC44-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 32 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3032ALC44-4 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 32 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3032ALC44-4N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 32 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3032ALC44-7 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 32 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM3032ALC44-7N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 3000A 32 Macro 34 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100