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參數(shù)資料
| 型號(hào)： | EPF10K100EBI356-2DX |
| 英文描述： | ASIC |
| 中文描述： | 專用集成電路 |
| 文件頁(yè)數(shù)： | 2/120頁(yè) |
| 文件大?。?/td> | 1901K |
| 代理商： | EPF10K100EBI356-2DX |
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10
Altera Corporation
FLEX 10KE Embedded Programmable Logic Family Data Sheet
Embedded Array Block
The EAB is a flexible block of RAM, with registers on the input and output
ports, that is used to implement common gate array megafunctions.
Because it is large and flexible, the EAB is suitable for functions such as
multipliers, vector scalars, and error correction circuits. These functions
can be combined in applications such as digital filters and
microcontrollers.
Logic functions are implemented by programming the EAB with a read-
only pattern during configuration, thereby creating a large LUT. With
LUTs, combinatorial functions are implemented by looking up the results,
rather than by computing them. This implementation of combinatorial
functions can be faster than using algorithms implemented in general
logic, a performance advantage that is further enhanced by the fast access
times of EABs. The large capacity of EABs enables designers to implement
complex functions in one logic level without the routing delays associated
with linked LEs or field-programmable gate array (FPGA) RAM blocks.
For example, a single EAB can implement any function with 8 inputs and
16 outputs. Parameterized functions such as LPM functions can take
advantage of the EAB automatically.
The FLEX 10KE EAB provides advantages over FPGAs, which implement
on-board RAM as arrays of small, distributed RAM blocks. These small
FPGA RAM blocks must be connected together to make RAM blocks of
manageable size. The RAM blocks are connected together using
multiplexers implemented with more logic blocks. These extra
multiplexers cause extra delay, which slows down the RAM block. FPGA
RAM blocks are also prone to routing problems because small blocks of
RAM must be connected together to make larger blocks. In contrast, EABs
can be used to implement large, dedicated blocks of RAM that eliminate
these timing and routing concerns.
The FLEX 10KE enhanced EAB adds dual-port capability to the existing
EAB structure. The dual-port structure is ideal for FIFO buffers with one
or two clocks. The FLEX 10KE EAB can also support up to 16-bit-wide
RAM blocks and is backward-compatible with any design containing
FLEX 10K EABs. The FLEX 10KE EAB can act in dual-port or single-port
mode. When in dual-port mode, separate clocks may be used for EAB
read and write sections, which allows the EAB to be written and read at
different rates. It also has separate synchronous clock enable signals for
the EAB read and write sections, which allow independent control of
these sections.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EPF10K100EBI356-3DX | ASIC |
| EPF10K100EFC256-1 | Field Programmable Gate Array (FPGA) |
| EPF10K100EFC256-1DX | ASIC |
| EPF10K100EFI672-1DX | ASIC |
| EPF10K100EFI672-2DX | ASIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EPF10K100EBI356-3DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| EPF10K100EFC256-1 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 10K 624 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF10K100EFC256-1DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| EPF10K100EFC256-1X | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 10K 624 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF10K100EFC256-2 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 10K 624 LABs 191 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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