參數(shù)資料
型號(hào)： EP4CGX75DF27C8N
廠商： Altera
文件頁(yè)數(shù)： 37/42頁(yè)
文件大?。?/td> 0K
描述： IC CYCLONE IV GX FPGA 75K 672FBG
產(chǎn)品培訓(xùn)模塊： Cyclone IV FPGA Family Overview
特色產(chǎn)品： Cyclone? IV FPGAs
標(biāo)準(zhǔn)包裝： 40
系列： CYCLONE® IV GX
LAB/CLB數(shù)： 4620
邏輯元件/單元數(shù)： 73920
RAM 位總計(jì)： 4257792
輸入/輸出數(shù)： 310
電源電壓： 1.16 V ~ 1.24 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 672-BGA
供應(yīng)商設(shè)備封裝： 672-FBGA（27x27）
1–42
Chapter 1: Cyclone IV Device Datasheet
Document Revision History
December 2013
Altera Corporation
Document Revision History
Table 1–47 lists the revision history for this chapter.
Table 1–47. Document Revision History
Date
Version
Changes
December 2013
1.8
Updated Table 1–21 by adding Note (15).
May 2013
1.7
Updated Table 1–15 by adding Note (4).
October 2012
1.6
■ Updated the maximum value for VI, VCCD_PLL, VCCIO, VCC_CLKIN, VCCH_GXB, and VCCA_GXB
Table 1–1.
■ Updated Table 1–11 and Table 1–22.
■ Updated Table 1–21 to include peak-to-peak differential input voltage for the
Cyclone IV GX transceiver input reference clock.
■ Updated Table 1–29 to include the typical DCLK value.
■ Updated the minimum fHSCLK value in Table 1–31, Table 1–32, Table 1–33,
Table 1–34, and Table 1–35.
November 2011
1.5
■ Updated “Maximum Allowed Overshoot or Undershoot Voltage”, “Operating
Conditions”, and “PLL Specifications” sections.
■ Updated Table 1–2, Table 1–3, Table 1–4, Table 1–5, Table 1–8, Table 1–9,
Table 1–15, Table 1–18, Table 1–19, and Table 1–21.
■ Updated Figure 1–1.
December 2010
1.4
■ Updated for the Quartus II software version 10.1 release.
■ Updated Table 1–21 and Table 1–25.
■ Minor text edits.
July 2010
1.3
Updated for the Quartus II software version 10.0 release:
■ Updated Table 1–3, Table 1–4, Table 1–21, Table 1–25, Table 1–28, Table 1–30,
Table 1–40, Table 1–41, Table 1–42, Table 1–43, Table 1–44, and Table 1–45.
■ Updated Figure 1–2 and Figure 1–3.
■ Removed SW Requirement and TCCS for Cyclone IV Devices tables.
■ Minor text edits.
March 2010
1.2
Updated to include automotive devices:
■ Updated the “Operating Conditions” and “PLL Specifications” sections.
■ Updated Table 1–1, Table 1–8, Table 1–9, Table 1–21, Table 1–26, Table 1–27,
Table 1–31, Table 1–32, Table 1–33, Table 1–34, Table 1–35, Table 1–36,
Table 1–37, Table 1–38, Table 1–40, Table 1–42, and Table 1–43.
■ Added Table 1–5 to include ESD for Cyclone IV devices GPIOs and HSSI I/Os.
■ Added Table 1–44 and Table 1–45 to include IOE programmable delay for
Cyclone IV E 1.2 V core voltage devices.
■ Minor text edits.
February 2010
1.1
■ Updated Table 1–3 through Table 1–44 to include information for Cyclone IV E
devices and Cyclone IV GX devices for Quartus II software version 9.1 SP1 release.
■ Minor text edits.
November 2009
1.0
Initial release.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP4CGX75DF27I7 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone IV GX 4620 LABs 310 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4CGX75DF27I7N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone IV GX 4620 LABs 310 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4CGX75F17C8 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Cyclone IV Device Datasheet
EP4CGX75F23C8N 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Cyclone IV FPGA Device Faily Overview
EP4CGX75F23I7N 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Cyclone IV Device Datasheet
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