參數(shù)資料
      

      


      


      
型號：
EP4CE115F23I7

      

      
廠商：
Altera

      

      
文件頁數(shù)：
4/42頁

      

      
文件大小：
0K

      

      
描述：
IC CYCLONE IV FPGA 115K 484-FBGA

      

      
產(chǎn)品培訓(xùn)模塊：
Three Reasons to Use FPGA's in Industrial Designs
      
	Cyclone IV FPGA Family Overview
      		

      

      
特色產(chǎn)品：
Cyclone? IV FPGAs
      		

      

      
標(biāo)準(zhǔn)包裝：
60

      

      
系列：
CYCLONE® IV E

      

      
LAB/CLB數(shù)：
7155
      		

      

      
邏輯元件/單元數(shù)：
114480
      		

      

      
RAM 位總計：
3981312
      		

      

      
輸入/輸出數(shù)：
280
      		

      

      
電源電壓：
1.15 V ~ 1.25 V
      		

      

      
安裝類型：
表面貼裝
      		

      

      
工作溫度：
-40°C ~ 100°C
      		

      

      
封裝/外殼：
484-BGA
      		

      

      
供應(yīng)商設(shè)備封裝：
484-FBGA（23x23）
      		

      

      

      

	
      
    
    

    
      
	
      1–12
      Chapter 1: Cyclone IV Device Datasheet
      Operating Conditions
      December 2013
      Altera Corporation
      Schmitt Trigger Input
      Cyclone IV devices support Schmitt trigger input on the TDI, TMS, TCK, nSTATUS,
      nCONFIG
      , nCE, CONF_DONE, and DCLK pins. A Schmitt trigger feature introduces
      hysteresis to the input signal for improved noise immunity, especially for signals with
      slow edge rate. Table 1–14 lists the hysteresis specifications across the supported
      VCCIO range for Schmitt trigger inputs in Cyclone IV devices.
      I/O Standard Specifications
      The following tables list input voltage sensitivities (VIH and VIL), output voltage (VOH
      and VOL), and current drive characteristics (IOH and IOL), for various I/O standards
      supported by Cyclone IV devices. Table 1–15 through Table 1–20 provide the I/O
      standard specifications for Cyclone IV devices.
      Table 1–14. Hysteresis Specifications for Schmitt Trigger Input in Cyclone IV Devices
      Symbol
      Parameter
      Conditions (V)
      Minimum
      Unit
      VSCHMITT
      Hysteresis for Schmitt trigger
      input
      VCCIO = 3.3
      200
      mV
      VCCIO = 2.5
      200
      mV
      VCCIO = 1.8
      140
      mV
      VCCIO = 1.5
      110
      mV
      Table 1–15. Single
      -Ended I/O Standard Specifications for Cyclone IV Devices (1), (2)
      I/O Standard
      VCCIO (V)
      VIL (V)
      VIH (V)
      VOL (V)
      VOH (V)
      IOL
      (mA)
      IOH
      (mA)
      Min
      Typ
      Max
      Min
      Max
      Min
      Max
      Min
      3.3
      -V LVTTL (3)
      3.135
      3.3
      3.465
      —
      0.8
      1.7
      3.6
      0.45
      2.4
      4
      –4
      3.3
      -V LVCMOS (3)
      3.135
      3.3
      3.465
      —
      0.8
      1.7
      3.6
      0.2
      VCCIO – 0.2
      2
      –2
      3.0
      -V LVTTL (3)
      2.85
      3.0
      3.15
      –0.3
      0.8
      1.7
      VCCIO + 0.3
      0.45
      2.4
      4
      –4
      3.0
      -V LVCMOS (3)
      2.85
      3.0
      3.15
      –0.3
      0.8
      1.7
      VCCIO + 0.3
      0.2
      VCCIO – 0.2
      0.1
      –0.1
      2.5 V (3)
      2.375
      2.5
      2.625
      –0.3
      0.7
      1.7
      VCCIO + 0.3
      0.4
      2.0
      1
      –1
      1.8 V
      1.71
      1.8
      1.89
      –0.3
      0.35 x
      VCCIO
      0.65 x
      VCCIO
      2.25
      0.45
      VCCIO –
      0.45
      2–2
      1.5 V
      1.425
      1.5
      1.575
      –0.3
      0.35 x
      VCCIO
      0.65 x
      VCCIO
      VCCIO + 0.3
      0.25 x
      VCCIO
      0.75 x
      VCCIO
      2–2
      1.2 V
      1.14
      1.2
      1.26
      –0.3
      0.35 x
      VCCIO
      0.65 x
      VCCIO
      VCCIO + 0.3
      0.25 x
      VCCIO
      0.75 x
      VCCIO
      2–2
      3.0-V PCI
      2.85
      3.0
      3.15
      —
      0.3 x
      VCCIO
      0.5 x
      VCCIO
      VCCIO + 0.3 0.1 x VCCIO
      0.9 x VCCIO
      1.5
      –0.5
      3.0-V PCI-X
      2.85
      3.0
      3.15
      —
      0.35 x
      VCCIO
      0.5 x
      VCCIO
      VCCIO + 0.3 0.1 x VCCIO
      0.9 x VCCIO
      1.5
      –0.5
      Notes to Table 1–15:
      (1) For voltage
      -referenced receiver input waveform and explanation of terms used in Table 1–15, refer to “Glossary” on page 1–37.
      (2) AC load CL = 10 pF
      (3) For more information about interfacing Cyclone IV devices with 3.3/3.0/2.5
      -V LVTTL/LVCMOS I/O standards, refer to AN 447: Interfacing Cyclone III
      (4) To meet the IOL and IOH specifications, you must set the current strength settings accordingly. For example, to meet the 3.3-V LVTTL specification (4
      mA), set the current strength settings to 4 mA or higher. Setting at lower current strength may not meet the IOL and IOH specifications in the handbook.
      
    
      
    
    
      


      


      

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      相關(guān)代理商/技術(shù)參數(shù)
      		

      參數(shù)描述
      		

      
      

      
EP4CE115F23I7N
功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone IV E 7155 LABs 280 IOs
 RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

      

      
EP4CE115F23I8L
功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone IV E 7155 LABs 280 IOs
 RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

      

      
EP4CE115F23I8LN
功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone IV E 7155 LABs 280 IOs
 RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

      

      
EP4CE115F29C7
功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone IV E 7155 LABs 528 IOs
 RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

      

      
EP4CE115F29C7N
功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone IV E 7155 LABs 528 IOs
 RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256

      

      
    
    
    
	
      	
    
    
     
     
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