參數(shù)資料
型號: EP20K200BI356-2ES
英文描述: FPGA
中文描述: FPGA的
文件頁數(shù): 25/114頁
文件大?。?/td> 1623K
代理商: EP20K200BI356-2ES
18
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
Figure 8. APEX 20K LE Operating Modes
Notes:
(1)
LEs in normal mode support register packing.
(2)
There are two LAB-wide clock enables per LAB.
(3)
When using the carry-in in normal mode, the packed register feature is unavailable.
(4)
A register feedback multiplexer is available on LE1 of each LAB.
(5)
The DATA1 and DATA2 input signals can supply counter enable, up or down control, or register feedback signals for
LEs other than the second LE in an LAB.
(6)
The LAB-wide synchronous clear and LAB wide synchronous load affect all registers in an LAB.
PRN
CLRN
DQ
4-Input
LUT
Carry-In
(3)
Cascade-Out
Cascade-In
LE-Out
Normal Mode (1)
PRN
CLRN
DQ
Cascade-Out
Cascade-In
3-Input
LUT
Carry-In
3-Input
LUT
Carry-Out
Arithmetic Mode
Counter Mode
data1
(5)
data2
(5)
PRN
CLRN
DQ
Carry-In
LUT
3-Input
LUT
Carry-Out
data3 (data)
Cascade-Out
Cascade-In
LAB-Wide
Synchronous
Load
(6)
LAB-Wide
Synchronous
Clear
(6)
(4)
LE-Out
ENA
LAB-Wide
Clock Enable
(2)
ENA
LAB-Wide
Clock Enable
(2)
ENA
LAB-Wide
Clock Enable
(2)
data1
data2
data1
data2
data3
data4
相關(guān)PDF資料
PDF描述
EP20K200BI356-3ES 5V, Byte Alterable EEPROM; Temperature Range: 0&degC to 70°C; Package: 32-PLCC T&R
EP20K200CB356I7ES 5V, Byte Alterable EEPROM; Temperature Range: -40°C to 85°C; Package: 32-PLCC T&R
EP20K200CB356I8ES ASIC
EP20K200CB356I9ES ASIC
EP20K200CB652C7 5V, Byte Alterable EEPROM; Temperature Range: -40°C to 85°C; Package: 32-PLCC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K200BI356-3ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
EP20K200C 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic
EP20K200CB356C7 制造商:Altera Corporation 功能描述:IC APEX 20KC FPGA 356BGA
EP20K200CB356C8 制造商:Altera Corporation 功能描述:IC APEX 20KC FPGA 356BGA
EP20K200CB356C9 制造商:Altera Corporation 功能描述:IC APEX 20KC FPGA 356BGA