鍨嬭櫉锛� | EP20K160ETC144-1 |
寤犲晢锛� | Altera |
鏂囦欢闋佹暩(sh霉)锛� | 104/117闋� |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC APEX 20KE FPGA 160K 144-TQFP |
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Three Reasons to Use FPGA's in Industrial Designs |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 60 |
绯诲垪锛� | APEX-20K® |
LAB/CLB鏁�(sh霉)锛� | 640 |
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� | 6400 |
RAM 浣嶇附瑷堬細 | 81920 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 88 |
闁€鏁�(sh霉)锛� | 404000 |
闆绘簮闆诲锛� | 1.71 V ~ 1.89 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | 0°C ~ 85°C |
灏佽/澶栨锛� | 144-LQFP |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 144-TQFP锛�20x20锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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25AA128-I/SN | IC EEPROM 128KBIT 10MHZ 8SOIC |
EP4CGX110DF27C8 | IC CYCLONE IV FPGA 110K 672FBGA |
AFS1500-2FGG484 | IC FPGA 8MB FLASH 1.5M 484-FBGA |
P1AFS1500-2FG484 | IC FPGA PIGEON POINT 484-FBGA |
M1AFS1500-2FGG484 | IC FPGA 8MB FLASH 1.5M 484-FBGA |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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EP20K160ETC144-1ES | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:FPGA |
EP20K160ETC144-1X | 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 CPLD - APEX 20K 640 Macro 88 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-256 |
EP20K160ETC144-2 | 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 CPLD - APEX 20K 640 Macro 88 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-256 |
EP20K160ETC144-2ES | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:FPGA |
EP20K160ETC144-2N | 鍔熻兘鎻忚堪:FPGA - 鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪 CPLD - APEX 20K 640 Macro 88 IOs RoHS:鍚� 鍒堕€犲晢:Altera Corporation 绯诲垪:Cyclone V E 鏌垫サ鏁�(sh霉)閲�: 閭忚集濉婃暩(sh霉)閲�:943 鍏�(n猫i)宓屽紡濉奟AM - EBR:1956 kbit 杓稿叆/杓稿嚭绔暩(sh霉)閲�:128 鏈€澶у伐浣滈牷鐜�:800 MHz 宸ヤ綔闆绘簮闆诲:1.1 V 鏈€澶у伐浣滄韩搴�:+ 70 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:FBGA-256 |