參數(shù)資料
型號: EP20K100QI240-2ES
英文描述: FPGA
中文描述: FPGA的
文件頁數(shù): 70/114頁
文件大小: 1623K
代理商: EP20K100QI240-2ES
Altera Corporation
59
APEX 20K Programmable Logic Device Family Data Sheet
Figure 32. APEX 20K AC Test Conditions
Operating
Conditions
Tables 23 through 26 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for 2.5-V APEX 20K devices.
System
C1 (includes
JIG capacitance)
Device input
rise and fall
times < 3 ns
Device
Output
to Test
Power supply transients can affect AC
measurements. Simultaneous transitions of
multiple outputs should be avoided for
accurate measurement. Threshold tests
must not be performed under AC conditions.
Large-amplitude, fast-ground-current
transients normally occur as the device
outputs discharge the load capacitances.
When these transients flow through the
parasitic inductance between the device
ground pin and the test system ground,
significant reductions in observable noise
immunity can result.
Table 23. APEX 20K Device Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min
Max
Unit
VCCINT
Supply voltage
With respect to ground (2)
–0.5
3.6
V
VCCIO
–0.5
4.6
V
VI
DC input voltage
–0.5
4.6
V
IOUT
DC output current, per pin
–25
25
mA
T STG
Storage temperature
No bias
–65
150
° C
T AMB
Ambient temperature
Under bias
–65
135
° C
T J
Junction temperature
PQFP, RQFP, TQFP, and BGA packages,
under bias
135
° C
Ceramic PGA packages, under bias
150
° C
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