Altera Corporation
4–45
January 2006
Stratix Device Handbook, Volume 1
DC & Switching Characteristics
and row pins for EP1S30 devices.
Table 4–73. EP1S30 External I/O Timing on Column Pins Using Fast Regional Clock Networks
Parameter
-5 Speed Grade
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Unit
Min
Max
Min
Max
Min
Max
Min
Max
tINSU
2.502
2.680
3.062
3.591
ns
tINH
0.000
ns
tOUTCO
2.473
4.965
2.473
5.329
2.473
5.784
2.473
6.392
ns
tXZ
2.413
4.839
2.413
5.197
2.413
5.660
2.413
6.277
ns
tZX
2.413
4.839
2.413
5.197
2.413
5.660
2.413
6.277
ns
Table 4–74. EP1S30 External I/O Timing on Column Pins Using Regional Clock Networks
Parameter
-5 Speed Grade
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Unit
MinMax
tINSU
2.286
2.426
2.769
3.249
ns
tINH
0.000
ns
tOUTCO
2.641
5.225
2.641
5.629
2.641
6.130
2.641
6.796
ns
tXZ
2.581
5.099
2.581
5.497
2.581
6.006
2.581
6.681
ns
tZX
2.581
5.099
2.581
5.497
2.581
6.006
2.581
6.681
ns
tINSUPLL
1.200
1.185
1.344
1.662
ns
tINHPLL
0.000
ns
tOUTCOPLL
1.108
2.367
1.108
2.534
1.108
2.569
1.108
2.517
ns
tXZPLL
1.048
2.241
1.048
2.402
1.048
2.445
1.048
2.402
ns
tZXPLL
1.048
2.241
1.048
2.402
1.048
2.445
1.048
2.402
ns
Table 4–75. EP1S30 External I/O Timing on Column Pins Using Global Clock Networks
(Part 1 of 2)
Parameter
-5 Speed Grade
-6 Speed Grade
-7 Speed Grade
-8 Speed Grade
Unit
MinMax
tINSU
1.935
2.029
2.310
2.709
ns
tINH
0.000
ns
tOUTCO
2.814
5.532
2.814
5.980
2.814
6.536
2.814
7.274
ns