參數(shù)資料
型號(hào): EM48AM3284LBA-75F
廠商: Electronic Theatre Controls, Inc.
英文描述: 512Mb (4M】4Bank】32) Synchronous DRAM
中文描述: 的512Mb(4分】4Bank】32)同步DRAM
文件頁(yè)數(shù): 1/17頁(yè)
文件大小: 231K
代理商: EM48AM3284LBA-75F
eorex
EM48AM3284LBA
Jul. 2006
www.eorex.com
1/17
512Mb (4M
×
4Bank
×
32) Synchronous DRAM
Features
Fully Synchronous to Positive Clock Edge
Single 1.8V +/- 0.1V Power Supply
LVCMOS Compatible with Multiplexed Address
Programmable Burst Length (B/L) - 1, 2, 4, 8
or Full Page
Programmable CAS Latency (C/L) - 2 or 3
Data Mask (DQM) for Read / Write Masking
Programmable Wrap Sequence
– Sequential (B/L = 1/2/4/8/full Page)
– Interleave (B/L = 1/2/4/8)
Burst Read with Single-bit Write Operation
All Inputs are Sampled at the Rising Edge of
the System Clock
Auto Refresh and Self Refresh
8,192 Refresh Cycles / 64ms (7.8us)
Ordering Information
Part No
EM48AM3284LBA-75F
Description
The EM48AM3284LBA is Synchronous Dynamic
Random Access Memory (SDRAM) organized as
4Meg words x 4 banks by 32 bits. All inputs and
outputs are synchronized with the positive edge of
the clock.
The 512Mb SDRAM uses synchronized pipelined
architecture to achieve high speed data transfer
rates and is designed to operate at 1.8V low power
memory system. It also provides auto refresh with
power saving / down mode. All inputs and outputs
voltage levels are compatible with LVCMOS.
Available packages: TFBGA-90B(13mmx11mm).
Organization
16M X 32
Max. Freq
133MHz @CL3
Package
TFBGA-90B
Grade
Commercial
Pb
Free
EM48AM3284LBA-75FE
16M X 32
133MHz @CL3
TFBGA-90B
Extend Temp.
Free
* EOREX reserves the right to change products or specification without notice.
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