FN7103.9 September 14, 2010 VOUT = Maximum output voltage of the application
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� EL8100ISZ-T13
寤犲晢锛� Intersil
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 2/14闋�(y猫)
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杞�(zhu菐n)鎻涢€熺巼锛� 200 V/µs
澧炵泭甯跺绌嶏細 100MHz
-3db甯跺锛� 200MHz
闆绘祦 - 杓稿叆鍋忓锛� 1.5µA
闆诲 - 杓稿叆鍋忕Щ锛� 800µV
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闆绘祦 - 杓稿嚭 / 閫氶亾锛� 65mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 3 V ~ 5 V锛�±1.5 V ~ 2.5 V
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瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 甯跺嵎 (TR)
10
FN7103.9
September 14, 2010
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7F tantalum
capacitor in parallel with a 0.1F ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire-wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier鈥檚 inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
Typical Applications
Video Sync Pulse Remover
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 27 shows a gain of 2 connections for EL8100,
EL8101. Figure 28 shows the complete input video signal
applied at the input, as well as the output signal with the
negative going sync pulse removed.
Multiplexer
Besides the normal power-down usage, the ENABLE pin of
the EL8100 can be used for multiplexing applications.
Figure 29 shows two EL8100s with the outputs tied together,
driving a back terminated 75
惟 video load. A 2VP-P 2MHz
sine wave is applied to Amp A and a 1VP-P 2MHz sine wave
is applied to Amp B. Figure 30 shows the ENABLE signal
and the resulting output waveform at VOUT. Observe the
break-before-make operation of the multiplexing. Amp A is
on and VIN1 is passed through to the output when the
ENABLE signal is low and turns off in about 25ns when the
ENABLE signal is high. About 200ns later, Amp B turns on
and VIN2 is passed through to the output. The
break-before-make operation ensures that more than one
amplifier isn鈥檛 trying to drive the bus at the same time.
FIGURE 27. SYNC PULSE REMOVER
5V
1K
VOUT
VIN
75
+
-
75
1k
75
VS+
VS-
FIGURE 28. VIDEO SIGNAL
1.0V
0.5V
0V
1.0V
0.5V
0V
M = 10s/DIV
VOUT
VIN
FIGURE 29. TWO TO ONE MULTIPLEXER
+2.5V
1k
2MHz
75
+
-
1K
75
-2.5V
VOUT
75
1VP-P
B
+2.5V
1K
2MHz
+
-
1k
75
-2.5V
2VP-P
A
ENABLE
EL8100, EL8101
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
208457030011026 CONNECTOR RECEPT 20POS STR
FTSH-107-01-F-DV-K CONN HEADER 14POS DUAL .05" SMD
B18B-XADSS-N CONN HDR XAD 18POS 2.5MM TIN TE
FTSH-105-01-F-DV-K-A CONN HEADER 10POS DUAL .05" SMD
B16B-XADSS-N CONN HDR XAD 16POS 2.5MM TIN TE
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鍙冩暩(sh霉)鎻忚堪
EL8100ISZ-T7 鍔熻兘鎻忚堪:閬�(y霉n)绠楁斁澶у櫒 - 閬�(y霉n)鏀� EL8100ISZ 200MHZ R2R AMP RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁�(b菙)鍎熼浕澹�:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
EL8100IW-T7 鍔熻兘鎻忚堪:閬�(y霉n)绠楁斁澶у櫒 - 閬�(y霉n)鏀� 200MHZ R-R RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁�(b菙)鍎熼浕澹�:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
EL8100IW-T7A 鍔熻兘鎻忚堪:IC OP AMP 200MHZ SOT23-6 RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:1.8 V/µs 澧炵泭甯跺绌�:6.5MHz -3db甯跺:4.5MHz 闆绘祦 - 杓稿叆鍋忓:5nA 闆诲 - 杓稿叆鍋忕Щ:100µV 闆绘祦 - 闆绘簮:65µA 闆绘祦 - 杓稿嚭 / 閫氶亾:35mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):1.8 V ~ 5.25 V锛�±0.9 V ~ 2.625 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:10-MSOP 鍖呰:绠′欢
EL8100IWZ-T7 鍔熻兘鎻忚堪:閬�(y霉n)绠楁斁澶у櫒 - 閬�(y霉n)鏀� EL8100IWZ 200MHZ R2R AMP RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁�(b菙)鍎熼浕澹�:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
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