參數(shù)資料
型號(hào): EL7563CM
英文描述: Monolithic 4 Amp DC:DC Step-down Regulator
中文描述: 單片4安培直流:DC降壓穩(wěn)壓器
文件頁(yè)數(shù): 18/18頁(yè)
文件大小: 1241K
代理商: EL7563CM
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EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
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Applications Information
Circuit Description
General
The EL7563C is a fixed frequency, current mode con-
trolled DC:DC converter with integrated N-channel
power MOSFETs and a high precision reference. The
device incorporates all the active circuitry required to
implement a cost effective, user-programmable 4A syn-
chronous step-down regulator suitable for use in DSP
core power supplies. By combining fused-lead packag-
ing technology with an efficient synchronous switching
architecture, high power output (10W) can be realized
without the use of discrete external heat sinks.
Theory of Operation
The EL7563C is composed of 7 major blocks:
1. PWM Controller
2. NMOS Power FETs and Drive Circuitry
3. Bandgap Reference
4. Oscillator
5. Temperature Sensor
6. Power Good and Power On Reset
7. Auxiliary Supply Tracking
PWM Controller
The EL7563C regulates output voltage through the use
of current-mode controlled pulse width modulation. The
three main elements in a PWM controller are the feed-
back loop and reference, a pulse width modulator whose
duty cycle is controlled by the feedback error signal, and
a filter which averages the logic level modulator output.
In a step-down (buck) converter, the feedback loop
forces the time-averaged output of the modulator to
equal the desired output voltage. Unlike pure voltage-
mode control systems, current-mode control utilizes
dual feedback loops to provide both output voltage and
inductor current information to the controller. The volt-
age loop minimizes DC and transient errors in the output
voltage by adjusting the PWM duty-cycle in response to
changes in line or load conditions. Since the output volt-
age is equal to the time-averaged of the modulator
output, the relatively large LC time constant found in
power supply applications generally results in low band-
width and poor transient response. By directly
monitoring changes in inductor current via a series sense
resistor the controller's response time is not entirely lim-
ited by the output LC filter and can react more quickly to
changes in line and load conditions. This feed-forward
characteristic also simplifies AC loop compensation
since it adds a zero to the overall loop response. Through
proper selection of the current-feedback to voltage-feed-
back ratio the overall loop response will approach a one-
pole system. The resulting system offers several advan-
tages over traditional voltage control systems, including
simpler loop compensation, pulse by pulse current limit-
ing, rapid response to line variation and good load step
response.
The heart of the controller is an input direct summing
comparator which sum voltage feedback, current feed-
back, slope compensation ramp and power tracking
signals together. Slope compensation is required to pre-
vent system instability that occurs in current-mode
topologies operating at duty-cycles greater than 50%
and is also used to define the open-loop gain of the over-
all system. The slope compensation is fixed internally
and optimized for 500mA inductor ripple current. The
power tracking will not contribute any input to the com-
parator steady-state operation. Current feedback is
measured by the patented sensing scheme that senses the
inductor current flowing through the high-side switch
whenever it is conducting. At the beginning of each
oscillator period the high-side NMOS switch is turned
on. The comparator inputs are gated off for a minimum
period of time of about 150ns (LEB) after the high-side
switch is turned on to allow the system to settle. The
Leading Edge Blanking (LEB) period prevents the
detection of erroneous voltages at the comparator inputs
due to switching noise. If the inductor current exceeds
the maximum current limit (ILMAX) a secondary over-
current comparator will terminate the high-side switch
on time. If ILMAX has not been reached, the feedback
voltage FB derived from the regulator output voltage
VOUT is then compared to the internal feedback refer-
ence voltage. The resultant error voltage is summed with
the current feedback and slope compensation ramp. The
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