參數(shù)資料
型號(hào): EL4581C
英文描述: Sync Separator(同步分離器)
中文描述: 同步分離器(同步分離器)
文件頁(yè)數(shù): 11/12頁(yè)
文件大小: 209K
代理商: EL4581C
EL4581C
Sync Separator 50% Slice S-H Filter
Description of Operation
A simplified block schematic is shown in Figure
2 The following description is intended to pro-
vide the user with sufficient information to be
able to understand the effects that the external
components and signal conditions have on the
outputs of the integrated circuit
The video signal is AC coupled to pin 2 via the
capacitor C1 nominally 01 mF The clamp circuit
A1 will prevent the input signal on pin 2 going
any more negative than 15V the value of refer-
ence voltage VR1 Thus the sync tip the most
negative part of the video waveform
will be
clamped at 15V The current source I1 nominal-
ly 10
mA charges the coupling capacitor during
the remaining portion of the H line approxi-
mately 58
ms for a 1575 kHz timebase From
I
t e C V the video time-constant can be
calculated It is important to note that the charge
taken from the capacitor during video must be
replaced during the sync tip time which is much
shorter (ratio of x 125) The corresponding cur-
rent to restore the charge during sync will there-
fore be an order of magnitude higher and any
resistance in series with CI will cause sync tip
crushing For this reason the internal series re-
sistance has been minimized and external high
resistance values in series with the input cou-
pling capacitor should be avoided The user can
exercise some control over the value of the input
time constant by introducing an external pull-up
resistance from pin 2 to the 5V supply The maxi-
mum voltage across the resistance will be VDD
less 15V for black level For a net discharge cur-
rent greater than zero the resistance should be
greater than 450k This will have the effect of
increasing the time constant and reducing the de-
gree of picture tilt The current source I1 directly
tracks reference current ITR and thus increases
with scan rate adjustment as explained later
The signal is processed through an active 3 pole
filter (F1) designed for minimum ripple with con-
stant phase delay The filter attenuates the color
burst by 24 dB and eliminates fast transient
spikes without sync crushing An external filter
is not necessary The filter also amplifies the
video signal by 6 dB to improve the detection
accuracy Note that the filter cut-off frequency is
a function of RSET through IOT and is propor-
tional to IOT
Internal reference voltages (block VREF) with
high immunity to supply voltage variation are
derived on the chip Reference VR4 with op-amp
A2 forces pin 6 to a reference voltage of 17V
nominal Consequently it can be seen that the
external resistance RSET will determine the val-
ue of the reference current ITR The internal re-
sistance R3 is only about 6 k
X much less than
RSET All the internal timing functions on the
chip are referenced to ITR and have excellent
supply voltage rejection
Comparator C2 on the input to the sample and
hold block (SH) compares the leading and trail-
ing edges of the sync pulse with a threshold volt-
age VR2 which is referenced at a fixed level above
the clamp voltage VR1 The output of C2 initiates
the timing one-shots for gating the sample and
hold circuits The sample of the sync tip is de-
layed by 08
ms to enable the actual sample of
2
ms to be taken on the optimum section of the
sync pulse tip The acquisition time of the circuit
is about three horizontal lines The double poly
CMOS technology enables long time constants to
be achieved with small high quality on-chip ca-
pacitors The back porch voltage is similarly de-
rived from the trailing edge of sync which also
serves to cut off the tip sample if the gate time
exceeds the tip period Note that the sample and
hold gating times will track RSET through IOT
The 50% level of the sync tip is derived through
the resistor divider R1 and R2 from the sample
and held voltages VTIP and VBP and applied to
the plus input of comparator C1 This compara-
tor has built in hysteresis to avoid false trigger-
ing The output of C2 is a digital 5V signal which
feeds the CS ouput buffer B1 and the other in-
ternal circuit blocks the vertical back porch and
oddeven functions
The vertical circuit senses the CS edges and ini-
tiates an integrator which is reset by the shorter
horizontal sync pulses but times out the longer
8
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EL4583CS-T7 Sync Separator, 50% Slice, S-H, Filter, HOUT
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EL4581CN 功能描述:IC VIDEO SYNC SEPARATOR 8-DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話,手機(jī),視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
EL4581CS 功能描述:IC VIDEO SYNC SEPARATOR 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話,手機(jī),視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
EL4581CS-T13 功能描述:IC SYNC SEPARATOR S-H 50% 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話,手機(jī),視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
EL4581CS-T7 功能描述:IC VIDEO SYNC SEPARATOR 8-SOIC RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話,手機(jī),視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064
EL4581CSZ 功能描述:視頻 IC EL4581CSZ SYNC SEP 50% SLICER W/FILTER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel