參數(shù)資料
型號: EFM32-G210F128-SK
廠商: Energy Micro
文件頁數(shù): 56/65頁
文件大?。?/td> 0K
描述: IC MICRO KIT GECKO 32QFN
標準包裝: 1
系列: Gecko
套件類型: 微控制器
值: 2 件 - 閃存 - 128KB
包裝: 紙板盒
安裝類型: 表面貼裝
包括封裝: 32-QFN
工具箱內(nèi)容: (2) 914-1011-2-ND - IC MCU 32BIT 128KB FLASH 32QFN
其它名稱: 914-1010
EFM32-G200/G210-SK-F128/64/32/16
EFM32-G210-SK-F128/64/32/16
...the world's most energy friendly microcontrollers
2013-06-28 - EFM32G210FXX - d0004_Rev1.60
6
www.energymicro.com
2.1.19 Voltage Comparator (VCMP)
The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can
be generated when the supply falls below or rises above a programmable threshold. Response time and
thereby also the current consumption can be configured by altering the current supply to the comparator.
2.1.20 Analog to Digital Converter (ADC)
The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits
at up to one million samples per second. The integrated input mux can select inputs from 4 external
pins and 6 internal signals.
2.1.21 Digital to Analog Converter (DAC)
The Digital to Analog Converter (DAC) can convert a digital value to an analog output voltage. The DAC
is fully differential rail-to-rail, with 12-bit resolution. It has one single ended output buffer connected to
channel 0. The DAC may be used for a number of different applications such as sensor interfaces or
sound output.
2.1.22 Advanced Encryption Standard Accelerator (AES)
The AES accelerator performs AES encryption and decryption with 128-bit or 256-bit keys. Encrypting or
decrypting one 128-bit data block takes 52 HFCORECLK cycles with 128-bit keys and 75 HFCORECLK
cycles with 256-bit keys. The AES module is an AHB slave which enables efficient access to the data
and key registers. All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit
operations are not supported.
2.1.23 General Purpose Input/Output (GPIO)
In the EFM32G210, there are 24 General Purpose Input/Output (GPIO) pins, which are divided into ports
with up to 16 pins each. These pins can individually be configured as either an output or input. More
advanced configurations like open-drain, filtering and drive strength can also be configured individually
for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM
outputs or USART communication, which can be routed to several locations on the device. The GPIO
supports up to 16 asynchronous external pin interrupts, which enables interrupts from any pin on the
device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other
peripherals.
2.2 Configuration Summary
The features of the EFM32G210 is a subset of the feature set described in the EFM32G Reference
Manual. Table 2.1 (p. 6) describes device specific implementation of the features.
Table 2.1. Configuration Summary
Module
Configuration
Pin Connections
Cortex-M3
Full configuration
NA
DBG
Full configuration
DBG_SWCLK, DBG_SWDIO,
DBG_SWO
MSC
Full configuration
NA
DMA
Full configuration
NA
RMU
Full configuration
NA
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