參數(shù)資料
型號(hào)： EDS1232AATA-60L-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 128M bits SDRAM (4M words x 32 bits)
中文描述： 4M X 32 SYNCHRONOUS DRAM, 5.4 ns, PDSO86
封裝： ROHS COMPLIANT, PLASTIC, TSOP2-86
文件頁(yè)數(shù)： 13/55頁(yè)
文件大?。?/td> 564K
代理商： EDS1232AATA-60L-E
EDS1232CABB, EDS1232CATA
Preliminary Data Sheet E0247E40 (Ver. 4.0)
13
Precharge command (/CS, /RAS, /WE = Low, /CAS = High)
This command begins precharge operation of the bank selected by BA0 and BA1. When A10 is High, all banks are
precharged, regardless of BA0 and BA1. When A10 is Low, only the bank selected by BA0 and BA1 is precharged.
After this command, the Synchronous DRAM can’t accept the activate command to the precharging bank during tRP
(precharge to activate command period). This command corresponds to a conventional DRAM’s /RAS rising.
/WE
/CAS
/RAS
/CS
CKE
CLK
H
Add
A10
BA0, BA1
(Bank select)
(Precharge select)
Precharge Command
Write command (/CS, /CAS, /WE = Low, /RAS = High)
If the mode register is in the burst write mode, this command sets the burst start address given by the column
address to begin the burst write operation. The first write data in burst mode can input with this command with
subsequent data on following clocks.
/WE
/CAS
/RAS
/CS
CKE
CLK
H
Add
A10
(Bank select)
Col.
Column Address and Write Command
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PDF描述
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EDS1232AATA-60TI 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM WTR (Wide Temperature Range)
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