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參數(shù)資料
| 型號： | EDS1232AABB-75 |
| 英文描述： | Programmable VCOM; Temperature Range: -40°C to 85°C; Package: 24-QFN T&R |
| 中文描述： | 內存| 4X1MX32 |的CMOS | BGA封裝| 90PIN |塑料 |
| 文件頁數(shù)： | 33/55頁 |
| 文件大?。?/td> | 570K |
| 代理商： | EDS1232AABB-75 |
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EDS1232AABB, EDS1232AATA
Data Sheet E0205E30 (Ver. 3.0)
39
Read command to Precharge command interval (same bank)
When the precharge command is executed for the same bank as the read command that preceded it, the minimum
interval between the two commands is one clock. However, since the output buffer then becomes High-Z after the
clocks defined by lHZP, there is a case of interruption to burst read data output will be interrupted, if the precharge
command is input during burst read. To read all data by burst read, the clocks defined by lEP must be assured as
an interval from the final data output to precharge command execution.
CLK
Command
DQ
READ
PRE/PALL
out A0
out A1
out A2
out A3
CL=2
lEP = -1 cycle
READ to PRECHARGE Command Interval (same bank): To output all data (CL = 2, BL = 4)
CLK
Command
DQ
READ
PRE/PALL
out A0
out A1
out A2
out A3
CL=3
lEP = -2 cycle
READ to PRECHARGE Command Interval (same bank): To output all data (CL = 3, BL = 4)
CLK
Command
DQ
READ
PRE/PALL
out A0
High-Z
lHZP = 2
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 2, BL = 1, 2, 4, 8)
CLK
Command
DQ
READ
PRE/PALL
out A0
lHZP =3
High-Z
READ to PRECHARGE Command Interval (same bank): To stop output data (CL = 3, BL = 1, 2, 4, 8)
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PDF描述 |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EDS1232AABB-75-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM |
| EDS1232AABB-75L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|4X1MX32|CMOS|BGA|90PIN|PLASTIC |
| EDS1232AABB-75L-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM |
| EDS1232AASE | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits) |
| EDS1232AASE-60-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits) |
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