參數(shù)資料
型號: EBD10RD4ADFA-7A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank)
中文描述: 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184
封裝: LEAD FREE, DIMM-184
文件頁數(shù): 5/19頁
文件大?。?/td> 207K
代理商: EBD10RD4ADFA-7A-E
EBD10RD4ADFA-E
Data Sheet E0607E10 (Ver. 1.0)
5
Serial PD Matrix*
1
Byte No.
Function described
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value
Comments
0
Number of bytes utilized by module
manufacturer
Total number of bytes in serial PD
device
1
0
0
0
0
0
0
0
80H
128
1
0
0
0
0
1
0
0
0
08H
256 byte
2
Memory type
0
0
0
0
0
1
1
1
07H
SDRAM DDR
3
Number of row address
0
0
0
0
1
1
0
1
0DH
13
4
Number of column address
0
0
0
0
1
1
0
0
0CH
12
5
Number of DIMM ranks
0
0
0
0
0
0
0
1
01H
1
6
Module data width
0
1
0
0
1
0
0
0
48H
72 bits
7
Module data width continuation
0
0
0
0
0
0
0
0
00H
0 (+)
8
Voltage interface level of this assembly 0
0
0
0
0
1
0
0
04H
SSTL 2.5V
9
DDR SDRAM cycle time, CL = X
-6B
0
1
1
0
0
0
0
0
60H
CL = 2.5*
3
-7A, -7B
0
1
1
1
0
1
0
1
75H
10
SDRAM access from clock (tAC)
-6B
0
1
1
1
0
0
0
0
70H
0.70ns*
3
-7A, -7B
0
1
1
1
0
1
0
1
75H
0.75ns*
3
11
DIMM configuration type
0
0
0
0
0
0
1
0
02H
ECC
12
Refresh rate/type
1
0
0
0
0
0
1
0
82H
7.8 μs
Self refresh
×
4
13
Primary SDRAM width
0
0
0
0
0
1
0
0
04H
14
Error checking SDRAM width
0
0
0
0
0
1
0
0
04H
×
4
15
SDRAM device attributes:
Minimum clock delay back-to-back
column access
SDRAM device attributes:
Burst length supported
SDRAM device attributes: Number of
banks on SDRAM device
SDRAM device attributes:
/CAS latency
SDRAM device attributes:
/CS latency
SDRAM device attributes:
/WE latency
0
0
0
0
0
0
0
1
01H
1 CLK
16
0
0
0
0
1
1
1
0
0EH
2, 4, 8
17
0
0
0
0
0
1
0
0
04H
4
18
0
0
0
0
1
1
0
0
0CH
2/2.5
19
0
0
0
0
0
0
0
1
01H
0
20
0
0
0
0
0
0
1
0
02H
1
21
SDRAM module attributes
0
0
1
0
0
1
1
0
26H
Registered
22
SDRAM device attributes: General
1
1
0
0
0
0
0
0
C0H
± 0.2V
23
Minimum clock cycle time at CLX - 0.5
-6B, -7A
0
1
1
1
0
1
0
1
75H
CL = 2*
3
-7B
1
0
1
0
0
0
0
0
A0H
24
Maximum data access time (tAC) from
clock at CLX - 0.5
-6B
0
1
1
1
0
0
0
0
70H
0.70ns*
3
-7A, -7B
0
1
1
1
0
1
0
1
75H
0.75ns*
3
25
Minimum clock cycle time at CLX - 1
0
0
0
0
0
0
0
0
00H
26
Maximum data access time (tAC) from
clock at CLX - 1
Minimum row precharge time (tRP)
-6B
0
0
0
0
0
0
0
0
00H
27
0
1
0
0
1
0
0
0
48H
18ns
-7A, -7B
0
1
0
1
0
0
0
0
50H
20ns
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EBD10RD4ADFA-7A RES MFLM 2K 0.1W 5% SMT0805
EBD10RD4ADFA 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank)
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EBD10RD4ADFA-7B 1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EBD10RD4ADFA-7B 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank)
EBD10RD4ADFA-7B-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank)
EBD10RD4ADFA-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Registered DDR SDRAM DIMM (128M words x72 bits, 1 Rank)
EBD11ED8ABFA 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:1GB Unbuffered DDR SDRAM DIMM
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