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| 型號(hào)： | EA-QSB-012 |
| 廠商： | Embedded Artists |
| 文件頁數(shù)： | 21/74頁 |
| 文件大小： | 0K |
| 描述： | BOARD QUICK START LPC1343 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | LPC13xx |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | LPC1343 |
| 所含物品： | 板 |
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LPC1311_13_42_43
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 6 June 2012
28 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
7.18.5.4
Deep power-down mode
In Deep power-down mode, power is shut off to the entire chip with the exception of the
WAKEUP pin. The LPC1311/13/42/43 can wake up from Deep power-down mode via the
WAKEUP pin.
A LOW-going pulse as short as 50 ns wakes up the part from Deep power-down mode.
When entering Deep power-down mode, an external pull-up resistor is required on the
WAKEUP pin to hold it HIGH. The RESET pin must also be held HIGH to prevent it from
floating while in Deep power-down mode.
7.19 System control
7.19.1 Start logic
The start logic connects external pins to corresponding interrupts in the NVIC. Each pin
NVIC interrupt vector table. The start logic pins can serve as external interrupt pins when
the chip is running. In addition, an input signal on the start logic pins can wake up the chip
from Deep-sleep mode when all clocks are shut down.
The start logic must be configured in the system configuration block and in the NVIC
before being used.
7.19.2 Reset
Reset has four sources on the LPC1311/13/42/43: the RESET pin, the Watchdog reset,
power-on reset (POR), and the Brown-Out Detection (BOD) circuit. The RESET pin is a
Schmitt trigger input pin. Assertion of chip reset by any source, once the operating voltage
attains a usable level, starts the IRC and initializes the flash controller.
When the internal reset is removed, the processor begins executing at address 0, which is
initially the reset vector mapped from the boot block. At that point, all of the processor and
peripheral registers have been initialized to predetermined values.
7.19.3 Brownout detection
The LPC1311/13/42/43 includes four levels for monitoring the voltage on the VDD pin. If
this voltage falls below one of the four selected levels, the BOD asserts an interrupt signal
to the NVIC. This signal can be enabled for interrupt in the Interrupt Enable Register in the
NVIC in order to cause a CPU interrupt; if not, software can monitor the signal by reading
a dedicated status register. An additional threshold level can be selected to cause a
forced reset of the chip.
7.19.4 Code security (Code Read Protection - CRP)
This feature of the LPC1311/13/42/43 allows user to enable different levels of security in
the system so that access to the on-chip flash and use of the Serial Wire Debugger (SWD)
and In-System Programming (ISP) can be restricted. When needed, CRP is invoked by
programming a specific pattern into a dedicated flash location. In-Application
Programming (IAP) commands are not affected by the CRP.
In addition, ISP entry via the PIO0_1 pin can be disabled without enabling CRP (NO_ISP
mode). For details see the LPC13xx user manual.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EA-QSB-015 | 功能描述:開發(fā)板和工具包 - ARM QUICK START BOARD LPC11U35 RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| EA-QSB-016 | 制造商:Embedded Artists 功能描述:BOARD QUICK START LPC4088 |
| EA-QSB-017 | 制造商:Embedded Artists 功能描述:BOARD QSB BASE LPC4088 |
| EA-QSB-100 | 功能描述:開發(fā)板和工具包 - ARM QUICKSTART PROTOTYPE BRD RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
| EA-QSB-102 | 功能描述:開發(fā)板和工具包 - ARM QUICKSTART PROTOTYPE BRD W/ LPC2106 RS232 RoHS:否 制造商:Arduino 產(chǎn)品:Development Boards 工具用于評(píng)估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V |
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