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163
SAM4CP [DATASHEET]
43051E–ATPL–08/14
Operation
The VFMA instruction:
1.
2.
Multiplies the floating-point values in the operand registers.
Accumulates the results into the destination register.
The result of the multiply is not rounded before the accumulation.
The VFMS instruction:
1.
2.
3.
4.
Negates the first operand register.
Multiplies the floating-point values of the first and second operand registers.
Adds the products to the destination register.
Places the results in the destination register.
The result of the multiply is not rounded before the addition.
Restrictions
There are no restrictions.
Condition Flags
These instructions do not change the flags.
12.6.11.9 VFNMA, VFNMS
Floating-point Fused Negate Multiply Accumulate and Subtract.
Syntax
VFNMA{
cond
}.F32 {
Sd,
}
Sn
,
Sm
VFNMS{
cond
}.F32 {
Sd,
}
Sn
,
Sm
where:
cond
is an optional condition code, see
“Conditional Execution”
.
Sd
is the destination register.
Sn, Sm
are the operand registers.
Operation
The VFNMA instruction:
1.
2.
3.
4.
Negates the first floating-point operand register.
Multiplies the first floating-point operand with second floating-point operand.
Adds the negation of the floating -point destination register to the product.
Places the result into the destination register.
The result of the multiply is not rounded before the addition.
The VFNMS instruction:
1.
2.
3.
Multiplies the first floating-point operand with second floating-point operand.
Adds the negation of the floating-point value in the destination register to the product.
Places the result in the destination register.
The result of the multiply is not rounded before the addition.
Restrictions
There are no restrictions.
Condition Flags
These instructions do not change the flags.