參數(shù)資料
型號： DSPIC33FJ12MC201-I/SS
廠商： Microchip Technology
文件頁數(shù)： 54/155頁
文件大小： 0K
描述： IC DSPIC MCU/DSP 12K 20SSOP
產(chǎn)品培訓(xùn)模塊： Asynchronous Stimulus
特色產(chǎn)品： PIC24FJ/33FJ MCUs & dsPIC? DSCs
標準包裝： 67
系列： dsPIC™ 33F
核心處理器： dsPIC
芯體尺寸： 16-位
速度： 40 MIP
連通性： I²C，IrDA，SPI，UART/USART
外圍設(shè)備： 高級欠壓探測/復(fù)位，電機控制 PWM，QEI，POR，PWM，WDT
輸入/輸出數(shù)： 15
程序存儲器容量： 12KB（12K x 8）
程序存儲器類型： 閃存
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
包裝： 管件
產(chǎn)品目錄頁面： 651 (CN2011-ZH PDF)
配用： DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
2010 Microchip Technology Inc.
DS41303G-page 281
PIC18F2XK20/4XK20
20.2
Comparator Control
Each comparator has a separate control and Configu-
ration register: CM1CON0 for Comparator C1 and
CM2CON0 for Comparator C2. In addition, Compara-
tor C2 has a second control register, CM2CON1, for
controlling the interaction with Timer1 and simultane-
ous reading of both comparator outputs.
The CM1CON0 and CM2CON0 registers (see Regis-
ters 20-1 and 20-2, respectively) contain the control
and Status bits for the following:
Enable
Input selection
Reference selection
Output selection
Output polarity
Speed selection
20.2.1
COMPARATOR ENABLE
Setting the CxON bit of the CMxCON0 register enables
the comparator for operation. Clearing the CxON bit
disables the comparator resulting in minimum current
consumption.
20.2.2
COMPARATOR INPUT SELECTION
The CxCH<1:0> bits of the CMxCON0 register direct
one of four analog input pins to the comparator
inverting input.
20.2.3
COMPARATOR REFERENCE
SELECTION
Setting the CxR bit of the CMxCON0 register directs an
internal voltage reference or an analog input pin to the
non-inverting
input
of
the
comparator.
See
for
more
information on the Internal Voltage Reference module.
20.2.4
COMPARATOR OUTPUT
SELECTION
The output of the comparator can be monitored by
reading either the CxOUT bit of the CMxCON0 register
or the MCxOUT bit of the CM2CON1 register. In order
to make the output available for an external connection,
the following conditions must be true:
CxOE bit of the CMxCON0 register must be set
Corresponding TRIS bit must be cleared
CxON bit of the CMxCON0 register must be set
20.2.5
COMPARATOR OUTPUT POLARITY
Inverting the output of the comparator is functionally
equivalent to swapping the comparator inputs. The
polarity of the comparator output can be inverted by
setting the CxPOL bit of the CMxCON0 register.
Clearing the CxPOL bit results in a non-inverted output.
Table 20-1 shows the output state versus input
conditions, including polarity control.
20.2.6
COMPARATOR SPEED SELECTION
The trade-off between speed or power can be opti-
mized during program execution with the CxSP control
bit. The default state for this bit is ‘1’ which selects the
normal speed mode. Device power consumption can
be optimized at the cost of slower comparator propaga-
tion delay by clearing the CxSP bit to ‘0’.
20.3
Comparator Response Time
The comparator output is indeterminate for a period of
time after the change of an input source or the selection
of a new reference voltage. This period is referred to as
the response time. The response time of the
comparator differs from the settling time of the voltage
reference. Therefore, both of these times must be
considered when determining the total response time
to a comparator input change. See the Comparator and
Voltage Reference Specifications in Section 26.0
Note:
To use CxIN+ and C12INx- pins as analog
inputs, the appropriate bits must be set in
the ANSEL register and the corresponding
TRIS bits must also be set to disable the
output drivers.
Note 1: The CxOE bit overrides the PORT data
latch. Setting the CxON has no impact on
the port override.
2: The internal output of the comparator is
latched
with
each
instruction
cycle.
Unless
otherwise
specified,
external
outputs are not latched.
TABLE 20-1:
COMPARATOR OUTPUT
STATE VS. INPUT
CONDITIONS
Input Condition
CxPOL
CxOUT
CxVIN- > CxVIN+
00
CxVIN- < CxVIN+
01
CxVIN- > CxVIN+
11
CxVIN- < CxVIN+
10
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSPIC33FJ12MC201T-E/SS 制造商:Microchip Technology Inc 功能描述:
dsPIC33FJ12MC201T-I/SO 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 12KBFLSH 1KB RAM 16B Motor Cntrl DSC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
dsPIC33FJ12MC201T-I/SS 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 12KBFLSH 1KB RAM 16B Motor Cntrl DSC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
dsPIC33FJ12MC202-E/ML 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 12KB FLSH 1024BRAM 16B nanoWatt RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
dsPIC33FJ12MC202-E/SO 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 12KB FLSH 1024BRAM 16B nanoWatt RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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