參數(shù)資料
型號: DS5001FP-16N
廠商: Maxim Integrated Products
文件頁數(shù): 24/27頁
文件大?。?/td> 0K
描述: IC MPU 128K 16MHZ IND 80-TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 66
系列: DS500x
核心處理器: 8051
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,SIO,UART/USART
外圍設(shè)備: 電源故障復(fù)位,WDT
輸入/輸出數(shù): 32
程序存儲器類型: SRAM
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-BQFP
包裝: 托盤
DS5001FP
6 of 27
PIN DESCRIPTION (continued)
PIN
80 PIN
44 PIN
NAME
FUNCTION
42
VRST
This I/O pin (open drain with internal pullup) indicates that the power supply
(VCC) has fallen below the VCCmin level and the micro is in a reset state. When
this occurs, the DS5001FP drives this pin to a logic 0. Because the micro is lithium-
backed, this signal is guaranteed even when VCC = 0V. Because it is an I/O pin, it
also forces a reset if pulled low externally. This allows multiple parts to synchronize
their power-down resets.
43
PF
This output goes to a logic 0 to indicate that VCC < VLI and the micro has
switched to lithium backup. Because the micro is lithium-backed, this signal is
guaranteed even when VCC = 0V. The normal application of this signal is to control
lithium-powered current to isolate battery-backed functions from non-battery-backed
functions.
14
40
MSEL
Memory Select. This signal controls the memory size selection. When MSEL =
+5V, the DS5001FP expects to use 32k x 8 SRAMs. When MSEL = 0V, the
DS5001FP expects to use a 128k x 8 SRAM. MSEL must be connected regardless of
partition, mode, etc.
73
N.C.
No Connection
INSTRUCTION SET
The DS5001FP executes an instruction set that is object code-compatible with the industry standard 8051
microcontroller. As a result, software development packages such as assemblers and compilers that have
been written for the 8051 are compatible with the DS5001FP. A complete description of the instruction
set and operation are provided in the Secure Microcontroller User’s Guide. Also note that the DS5001FP
is embodied in the DS2251T module. The DS2251T combines the DS5001FP with between 32k and 128k
of SRAM, a lithium cell, and a real-time clock. This is packaged in a 72-pin SIMM module.
MEMORY ORGANIZATION
Figure 2 illustrates the memory map accessed by the DS5001FP. The entire 64k of program and 64k of
data are potentially available to the byte-wide bus. This preserves the I/O ports for application use. The
user controls the portion of memory that is actually mapped to the byte-wide bus by selecting the program
range and data range. Any area not mapped into the NV RAM is reached by the expanded bus on ports 0
and 2. An alternate configuration allows dynamic partitioning of a 64k space as shown in Figure 3.
Selecting PES=1 provides another 64k of potential data storage or memory-mapped peripheral space as
shown in Figure 4. These selections are made using special function registers. The memory map and its
controls are covered in detail in the Secure Microcontroller User’s Guide.
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