
DS5000FP
11 of 22
AC CHARACTERISTICS: EXPANDED BUS MODE TIMING SPECIFICATIONS
(VCC = 5V
±5%, TA = 0°C to +70°C.)
#
PARAMETER
SYMBOL
MIN
MAX
UNITS
1
Oscillator Frequency
1/tCLK
1.0
16
MHz
2
ALE Pulse Width
tALPW
2tCLK -40
ns
3
Address Valid to ALE Low
tAVALL
tCLK -40
ns
4
Address Hold After ALE Low
tAVAAV
tCLK -35
ns
at 12MHz
4tCLK -150
5
ALE Low to Valid Instruction In
at 16MHz
tALLVI
4tCLK -90
ns
6
ALE Low to PSEN Low
tALLPSL
tCLK -25
ns
7
PSEN
Pulse Width
tPSPW
3tCLK -35
ns
at 12MHz
3tCLK -150
8
PSEN
Low to Valid Instruction In
at 16MHz
tPSLVI
3tCLK -90
ns
9
Input Instruction Hold after PSEN Going High
tPSIV
0
ns
10
Input Instruction Float after PSEN Going High
tPSIX
tCLK -20
ns
11
Address Hold after PSEN Going High
tPSAV
tCLK -8
ns
at 12MHz
5tCLK -150
12
Address Valid to Valid
Instruction In
at 16MHz
tAVVI
5tCLK -90
ns
13
PSEN
Low to Address Float
tPSLAZ
0
ns
14
RD
Pulse Width
tRDPW
6tCLK -100
ns
15
WR
Pulse Width
tWRPW
6tCLK -100
ns
at 12MHz
5tCLK -165
16
RD
Low to Valid Data In
at 16MHz
tRDLDV
5tCLK -105
ns
17
Data Hold after RD High
tRDHDV
0
ns
18
Data Float after RD High
tRDHDZ
2tCLK -70
ns
at 12MHz
8CLK -150
19
ALE Low to Valid Data In
at 16MHz
tALLVD
8tCLK -90
ns
at 12MHz
9tCLK -165
20
Valid Address to Valid Data In
at 16MHz
tAVDV
9tCLK -105
ns
21
ALE Low to RD or WR Low
tALLRDL
3tCLK -50
3tCLK +50
ns
22
Address Valid to RD or WR Low
tAVRDL
4tCLK -130
ns
23
Data Valid to WR Going Low
tDVWRL
tCLK -60
ns
at 12MHz
7tCLK -150
24
Data Valid to WR High
at 16MHz
tDVWRH
7tCLK -90
ns
25
Data Valid after WR High
tWRHDV
tCLK -50
ns
26
RD
Low to Address Float
tRDLAZ
0
ns
27
RD
or WR High to ALE High
tRDHALH
tCLK -40
tCLK +50
ns