I2C and JTAG Nonvolatile 9-Bit I/O Expander Plus Memory _________________" />
參數(shù)資料
型號(hào): DS4550E+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 16/18頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 9B 20TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C,JTAG
輸入/輸出數(shù): 9
中斷輸出: 無(wú)
頻率 - 時(shí)鐘: 400kHz
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
包括: EEPROM
DS4550
I2C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory
_____________________________________________________________________
7
I2C
INTERFACE
VCC
SDA
SCL
A0
A1
A2
TMS
TDI
TDO
TCK
GND
DS4550
BSC
EEPROM
64 BYTES
USER
MEMORY
I/O CONTROL
REGISTERS
PULLUP ENABLE (F0h-F1h)
I/O CONTROL (F2h-F3h)
I/O STATUS (F8h-F9h)
BOUNDARY SCAN CELL (BSC)
JTAG
CONTROL
PORT
VCC
I/O CELL
(x9)
RPU
I/O_n
[n = 0 TO 8]
VCC
RJPU
BSC
Block Diagram
Detailed Description
The DS4550 contains nine bidirectional, NV, input/out-
put (I/O) pins, and a 64-byte EEPROM user memory.
The I/O pins and user memory are accessible through
either the I2C compatible serial bus or the IEEE 1149.1
JTAG interface.
Programmable NV I/O Pins
Each programmable I/O pin consists of an input and an
open-collector output with a selectable internal pullup
resistor. To enable the pullups for each I/O pin, write to
the Pullup Enable Registers (F0h and F1h). To pull the
output low or place the pulldown transistor into a high-
impedance state, write to the I/O Control Registers (F2h
and F3h). To read the voltage levels present on the I/O
pins, read the I/O Status Registers (F8h and F9h). To
determine the status of the output register, read the I/O
Control Registers and the Pullup Resistor Registers.
The I/O Control Registers and the Pullup Enable
Registers are all SRAM-shadowed EEPROM registers.
It is possible to disable the EEPROM writes of the regis-
ters using the SEE bit in the Configuration Register.
This reduces the time required to write to the register
and increases the amount of times the I/O pins can be
adjusted before the EEPROM is worn out.
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