Quad-Channel, I2C-Margining IDACs with Three Channels of Power-Supply Tra" />
參數(shù)資料
型號(hào): DS4426T+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 10/15頁
文件大小: 0K
描述: IC DAC I2C-MARGINING 4CH 28-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 8
數(shù)據(jù)接口: I²C
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-TQFN-EP(4x4)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): *
DS4426
Quad-Channel, I2C-Margining IDACs with
Three Channels of Power-Supply Tracking
4
_______________________________________________________________________________________
Note 1: All voltages are referenced to GND. Current entering the IC is specified positive, and current exiting the IC is negative.
Note 2: Input resistors (RFS[3:0]) must be between the specified values to ensure the device meets its accuracy and linearity specifi-
cations.
Note 3: Supply current specified with all outputs set to zero current setting and with all inputs at VCC or GND. SDA and SCL are
connected to VCC. Excludes current through RFS resistors (IRFS). Total current including IRFS is ICC + (2 x IRFS).
Note 4: The output-voltage full-scale ranges must be satisfied to ensure the device meets its accuracy and linearity specifications.
Only applies to current DAC operation, not power-supply tracking operation.
Note 5: Temperature drift excludes drift caused by external resistors.
Note 6: Differential linearity is defined as the difference between the expected incremental current increase with respect to position
and the actual increase. The expected incremental increase is the full-scale range divided by 127.
Note 7: Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value.
The expected value is a straight line between the zero and the full-scale values proportional to the setting.
Note 8: Timing shown is for fast-mode operation (400kHz). This device is also backward-compatible with I2C standard-mode timing.
Note 9: CB—Total capacitance of one bus line in pF.
POWER-SUPPLY TRACKING CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C, see Figure 5.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Divider Ratio
RDIV
RA/RB and RC/RD
0.5
1
Output Load
RL
RL = (RF x RE )/(RF+RE)
1
20
k
Feedback Resistor Ratio
RF/RB
0.5
4.5
Gain Resistor
RG
0.8
10
k
Gain Setting Ratio
RL/RG
1.4
5
RL/RG = 2, RL = 5k , VCC = +3.6V,
TA = +25°C
2.4
Power-Supply Tracking Gain
GVI
RL/RG = 5, RL = 5k , VCC = +3.6V,
TA = +25°C
3.8
6.2
10
mA/V
Power-Supply Tracking Input
Bias Current
IB
1
μA
Power-Supply Tracking Input
Voltage
VIN
INP[3:1] and INN[3:1]
0
VCC -
1.4
V
Unity Gain Bandwidth
GBW
RL/RG = 1.4; RL = 5k
12
MHz
Output Voltage While Tracking
VOUT:TRK
Switch closed, VCC = +3.0V, measured at
OUT[3:1], RL = 5k
0
1.5
V
Output Current While Tracking
IOUT:TRK
RL/RG = 1.4, RG = 1k , VCC = +3.0V,
VFB = +0.8V
1
mA
Tracking Accuracy
±600
mV
Output Leakage
IBC
Switch open
0.5
μA
Comparator Input Bias Current
IOFF
1
μA
Comparator Input Offset
VOS
±5
mV
Switch Delay
tDC
5
μs
Comparator Hysteresis
VHYS
12.5
mV
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