Accurate I2C RTC with Integrated TCXO/Crystal/FRAM _____________" />
參數(shù)資料
型號(hào)： DS32C35-33#T&R
廠(chǎng)商： Maxim Integrated Products
文件頁(yè)數(shù)： 9/22頁(yè)
文件大小： 0K
描述： IC RTC ACCURATE I2C 3.3V 20-SOIC
產(chǎn)品變化通告： Product Discontinuation 28/Nov/2011
標(biāo)準(zhǔn)包裝： 1,000
類(lèi)型： 時(shí)鐘/日歷
特點(diǎn)： 警報(bào)器，F(xiàn)RAM，閏年，方波輸出，TCXO/晶體
存儲(chǔ)容量： 8KB
時(shí)間格式： HH:MM:SS（12/24 小時(shí)）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線(xiàn)串口
電源電壓： 2.7 V ~ 3.63 V
電壓 - 電源，電池： 2.3 V ~ 3.6 V
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 20-SOIC W
包裝： 帶卷 (TR)
DS32B35/DS32C35
Accurate I2C RTC with Integrated
TCXO/Crystal/FRAM
____________________________________________________________________
17
I2C Serial Data Bus
The DS32B35/DS32C35 support a bidirectional I2C bus
and data transmission protocol (Figure 1). A device that
sends data onto the bus is defined as a transmitter, and
a device receiving data is defined as a receiver. The
device that controls the message is called a master. The
devices that are controlled by the master are slaves.
The bus must be controlled by a master device that
generates the serial clock (SCL), controls the bus
access, and generates the START and STOP condi-
tions. The device operates as a slave on the I2C bus.
Connections to the bus are made through the SCL input
and open-drain SDA I/O lines. Within the bus specifica-
tions, a standard mode (100kHz maximum clock rate)
and a fast mode (400kHz maximum clock rate) are
defined. The DS32B35/DS32C35 work in both modes.
The following bus protocol has been defined (Figure 2):
Data transfer can be initiated only when the bus is
not busy.
During data transfer, the data line must remain stable
whenever the clock line is high. Changes in the data
line while the clock line is high are interpreted as
control signals.
STOP
CONDITION
OR REPEATED
START
CONDITION
REPEATED IF MORE BYTES
ARE TRANSFERED
ACK
START
CONDITION
ACK
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
SLAVE ADDRESS
MSB
SCL
SDA
R/W
DIRECTION
BIT
12
6
7
8
9
1
2
8
9
3–7
Figure 2. I2C Data Transfer Overview
SDA
SCL
tHD:STA
tLOW
tHIGH
tR
tF
tBUF
tHD:DAT
tSU:DAT
REPEATED
START
tSU:STA
tHD:STA
tSU:STO
tSP
STOP
START
Figure 1. Data Transfer on I2C Serial Bus
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