參數(shù)資料
型號(hào)： DS26522GN+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 124/258頁(yè)
文件大?。?/td> 0K
描述： IC TXRX T1/E1/J1 DUAL 144CSBGA
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 160
類型： 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 2/2
規(guī)程： RS232
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 144-BGA，CSPBGA
供應(yīng)商設(shè)備封裝： 144-TECSBGA（13x13）
包裝： 托盤
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DS26522 Dual T1/E1/J1 Transceiver
21 of 258
NAME
PIN
TYPE
FUNCTION
RECEIVE FRAMER
RSER1
K5
RSER2
H12
O
Received Serial Data.
Received NRZ serial data. Updated on rising edges of
RCLK when the receive-side elastic store is disabled. Updated on the rising edges
of RSYSCLK when the receive-side elastic store is enabled.
When IBO mode is used, the RSER pins can output data for multiple framers. The
RSER data is synchronous to RSYSCLK. This is described in Section 8.8.2.
RCLK1
L8
RCLK2
L9
O
Receive Clock.
A 1.544MHz (T1) or 2.048MHz (E1) clock that is used to clock
data through the receive-side framer. This clock is recovered from the signal at
RTIP and RRING. RSER data is output on the rising edge of RCLK. RCLK is used
to output RSER when the elastic store is not enabled or IBO is not used. When the
elastic store is enabled or IBO is used, the RSER is clocked by RSYSCLK.
RSYSCLK1
J8
RSYSCLK2
J11
I
Receive System Clock.
1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or
16.384MHz receive backplane clock. Only used when the receive-side elastic store
function is enabled. Should be tied low in applications that do not use the receive-
side elastic store. Multiple of 2.048MHz is expected when the IBO mode is used.
Note that RSYSCLK is used for both transceivers.
RSYNC1
K7
RSYNC2
K12
I/O
Receive Synchronization.
If the receive-side elastic store is enabled, then this
signal is used to input a frame or multiframe boundary pulse. If set to output frame
boundaries, then RSYNC can be programmed to output double-wide pulses on
signaling frames in T1 mode. In E1 mode, RSYNC out can be used to indicate
CAS and CRC-4 multiframe. The DS26522 can accept H.100-compatible
synchronization signal. The default direction of this pin at power-up is input, as
determined by the RSIO control bit in the RIOCR.2 register.
RMSYNC1/
RFSYNC1
G6
RMSYNC2/
RFSYNC2
L12
O
Receive Multiframe/Frame Synchronization.
A dual function pin to indicate
frame or multiframe synchronization. RFSYNC is an extracted 8kHz pulse, one
RCLK wide that identifies frame boundaries. RMSYNC is an extracted pulse, one
RCLK wide (elastic store disabled) or one RSYSCLK wide (elastic store enabled),
that identifies multiframe boundaries. When the receive elastic store is enabled,
the RMSYNC signal indicates the multiframe sync on the system (backplane) side
of the elastic store. In E1 mode, this pin can indicate either the CRC-4 or CAS
multiframe as determined by the RSMS2 control bit in the Receive I/O
Configuration register (RIOCR.1).
RSIG1
H6
RSIG2
L11
O
Receive Signaling.
Outputs signaling bits in a PCM format. Updated on rising
edges of RCLK when the receive-side elastic store is disabled. Updated on the
rising edges of RSYSCLK when the receive-side elastic store is enabled.
AL/
RSIGF/
FLOS1
F6
AL/
RSIGF/
FLOS2
J12
O
Analog Loss/Receive-Signaling Freeze/Framer LOS.
Analog LOS reflects the
LOS (loss of signal) detected by the LIU front-end and framer LOS is LOS
detection by the corresponding framer; the same pins can reflect receive-signaling
freeze indications. This selection can be made by settings in the Global
Transceiver Clock Control register (GTCCR ).
If framer LOS is selected, this pin can be programmed to toggle high when the
framer detects an LOS condition, or when the signaling data is frozen via either
automatic or manual intervention. The indication is used to alert downstream
equipment of the condition.
RLF/
LTC1
J5
RLF/
LTC2
M12
O
Receive Loss of Frame/Loss of Transmit Clock.
This pin can be programmed to
either toggle high when the synchronizer is searching for the frame and multiframe,
or to toggle high if the TCLK pin has not been toggled for approximately three clock
periods.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26522GN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 2-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS26524 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Quad T1/E1/J1 Transceiver
DS26524_07 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Quad T1/E1/J1 Transceiver
DS26524DK 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS26524 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS26524G 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4-Port E1/T1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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