參數(shù)資料
型號: DS26503LN+
廠商: Maxim Integrated Products
文件頁數(shù): 1/122頁
文件大小: 0K
描述: IC T1/E1/J1 BITS ELEMENT 64-LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 160
類型: BITS 元件,多路復(fù)用器
PLL:
主要目的: T1/E1
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 6.312MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 1430 (CN2011-ZH PDF)
1 of 122
REV: 121707
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
GENERAL DESCRIPTION
The DS26503 is a building-integrated timing-
supply (BITS) clock-recovery element. It also
functions as a basic T1/E1 transceiver. The
receiver portion can recover a clock from T1,
E1,
and
6312kHz
synchronization
timing
interfaces.
In
T1
and
E1
modes,
the
Synchronization Status Message (SSM) can also
be recovered. The transmit portion can directly
interface to T1 or E1 interfaces as well as source
the SSM in T1 and E1 modes. The DS26503 can
translate between any of the supported inbound
synchronization clock rates to any supported
outbound rate. A separate output is provided to
source
a
6312kHz
clock.
The
device
is
controlled through a parallel, serial, or hardware
controller port.
APPLICATIONS
BITS Timing
Rate Conversion
Basic Transceiver
ORDERING INFORMATION
PART
TEMP RANGE
PIN-PACKAGE
DS26503L
0°C to +70°C
64 LQFP
DS26503LN
-40°C to +85°C
64 LQFP
FEATURES
G.703 2048kHz Synchronization Interface
Compliant
G.703 6312kHz Japanese Synchronization
Interface Compliant
Interfaces to Standard T1/J1 (1.544MHz) and
E1 (2.048MHz)
Interface to CMI-Coded T1/J1 and E1
Short- and Long-Haul Line Interface
Transmit and Receive T1 and E1 SSM
Messages with Message Validation
T1/E1 Jitter Attenuator with Bypass Mode
Fully Independent Transmit and Receive
Functionality
Internal Software-Selectable Receive- and
Transmit-Side Termination for
75
Ω/100Ω/110Ω/120Ω
Monitor Mode for Bridging Applications
Accepts 16.384MHz, 12.8MHz, 8.192MHz,
4.096MHz, 2.048MHz, or 1.544MHz Master
Clock
8-Bit Parallel Control Port, Multiplexed or
Nonmultiplexed, Intel or Motorola
Serial (SPI) Control Port
Hardware Control Mode
Provides LOS, AIS, and LOF Indications
Through Hardware Output Pins
Fast Transmitter-Output Disable Through
Device Pin for Protection Switching
IEEE 1149.1 JTAG Boundary Scan
3.3V Supply with 5V-Tolerant Inputs and
Outputs
DS26503
T1/E1/J1 BITS Element
www.maxim-ic.com
DESIGN KIT AVAILABLE
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