參數(shù)資料
型號: DS26303L-120+A3
廠商: Maxim Integrated Products
文件頁數(shù): 60/101頁
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 144-ELQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 8/8
規(guī)程: T1/E1/J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP 裸露焊盤
供應商設備封裝: 144-LQFP 裸露焊盤
包裝: 托盤
其它名稱: 90-26303+1A3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
61 of 101
Table 6-6. AIS Criteria T1.231, G.775, and ETS 300 233 Specifications
STANDARD
CRITERIA
ITU-T G.775 FOR E1
ETS 300 233 FOR E1
ANSI T1.231 FOR T1
AIS
Detection
Two or fewer 0s in each of two
consecutive 512-bit streams
received.
Fewer than three 0s detected
in 512-bit period.
Fewer than nine 0s detected
in a 8192-bit period (a ones
density of 99.9% over a period
of 5.3ms) are received.
AIS
Clearance
Three or more 0s in each of two
consecutive 512-bit streams
received.
Three or more 0s in a 512-bit
period received.
Nine or more 0s detected in a
8192-bit period are received.
Table 6-7. AIS Detection and Reset Criteria
STANDARD
CRITERIA
ITU-T G.775 FOR E1
ETS 300 233 FOR E1
ANSI T1.231 FOR T1
AIS
Detection
Two or fewer 0 in each of two
consecutive 512-bit streams
received.
Fewer than three 0s detected
in 512-bit period.
Fewer than nine 0s contained
in 8192 bits.
AIS
Clearance
Three or more 0s in each of two
consecutive 512-bit streams
received.
Three or more 0s in a 512-bit
period received.
Nine or more bits received in a
8192-bit stream.
Table 6-8. Registers Related to AIS Detection
REGISTER
NAME
FUNCTIONALITY
LOS/AIS Criteria Selection
Section criteria for AIS. T1.231, G.775, ETSI 300 233 for
E1.
Alarm Indication Signal Status
Set when AIS is detected.
AIS Interrupt Enable
If reset interrupt due to AIS is not generated.
AIS Interrupt Status
Latched if there is a change in AIS and the interrupt is
enabled.
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