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參數(shù)資料
| 型號： | DS2423X |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | Memory IC:Other |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, UUC |
| 封裝： | CHIP SCALE PKG |
| 文件頁數(shù)： | 21/25頁 |
| 文件大小： | 579K |
| 代理商： | DS2423X |
DS2422/DS2423
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WRITING WITH VERIFICATION
To write data to the DS242X, the scratchpad has to be used as intermediate storage. First the master
issues the Write Scratchpad command to specify the desired target address, followed by the data to be
written to the scratchpad. Under certain conditions (see Write Scratchpad command) the master will
receive an inverted CRC16 of the command, address and data at the end of the Write Scratchpad
command sequence. Knowing this CRC value, the master can compare it to the value it has calculated
itself to decide if the communication was successful and proceed to the Copy Scratchpad command. If the
master could not receive the CRC16, it has to send the Read Scratchpad command to read back the
scratchpad to verify data integrity. As preamble to the scratchpad data, the DS242X repeats the target
address TA1 and TA2 and sends the contents of the E/S register. If the PF flag is set, data did not arrive
correctly in the scratchpad. The master does not need to continue reading; it can start a new trial to write
data to the scratchpad. Similarly, a set AA flag indicates that the Write command was not recognized by
the device. If everything went correctly, both flags are cleared and the ending offset indicates the address
of the last byte written to the scratchpad. Now the master can continue reading and verifying every data
byte. After the master has verified the data, it has to send the Copy Scratchpad command. This command
must be followed exactly by the data of the three address registers TA1, TA2 and E/S. The master may
obtain the contents of these registers by reading the scratchpad or derive it from the target address and the
amount of data to be written. As soon as the DS242X has received these bytes correctly, it will copy the
data to the requested location beginning at the target address.
MEMORY FUNCTION COMMANDS
The “Memory Function Flow Chart” (Figure 7) describes the protocols necessary for accessing the
memory. An example follows the flowchart. The communication between master and DS242X takes
place either at regular speed (default, OD = 0) or at Overdrive Speed (OD = 1). If not explicitly set into
the Overdrive Mode the DS242X assumes regular speed.
Write Scratchpad Command [0FH]
After issuing the Write Scratchpad command, the master must first provide the 2-byte target address,
followed by the data to be written to the scratchpad. The data will be written to the scratchpad starting at
the byte offset (T4:T0). The ending offset (E4: E0) will be the byte offset at which the master stops
writing data. Only full data bytes are accepted. If the last data byte is incomplete its content will be
ignored and the partial byte flag PF will be set.
When executing the Write Scratchpad command the CRC generator inside the DS242X (see Figure 12)
calculates a CRC over the entire data stream, starting at the command code and ending at the last data
byte sent by the master. This CRC is generated using the CRC16 polynomial by first clearing the CRC
generator and then shifting in the command code (0FH) of the Write Scratchpad command, the Target
Addresses TA1 and TA2 as supplied by the master and all the data bytes. The master may end the Write
Scratchpad command at any time. However, if the ending offset is 11111b, the master may send 16 read
time slots and will receive the CRC generated by the DS242X.
The memory address range of the DS2422 is 0000H to 007FH and 0000H to 01FFH for the DS2423,
respectively. If the bus master sends a target address higher than this, the internal circuitry of the chip
will set the nine (DS2422) or seven (DS2423) most significant address bits to 0 as they are shifted into
the internal address register. The Read Scratchpad command will reveal the target address as it will be
used by the DS242X. The master will identify such address modifications by comparing the target
address read back to the target address transmitted. If the master does not read the scratchpad, a
subsequent Copy Scratchpad command will not work since the most significant bits of the target address
the master sends will not match the value the DS242X expects.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2423 | 4K X 1 STANDARD SRAM, PDSO6 |
| DS2422 | 1K X 1 STANDARD SRAM, PDSO6 |
| DS2430AP | 256 X 1 1-WIRE SERIAL EEPROM, PDSO6 |
| DS2430A | 32 X 8 1-WIRE SERIAL EEPROM, PBCY3 |
| DS2430AX | 32 X 8 1-WIRE SERIAL EEPROM, UUC2 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS243 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| DS2430 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:256-Bit 1-Wire EEPROM |
| DS2430A | 功能描述:電可擦除可編程只讀存儲器 RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| DS2430A R | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:256-Bit 1-Wire EEPROM |
| DS2430A T | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:256-Bit 1-Wire EEPROM |
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